ffb6aec603
This patch takes the final plunge and transitions from the templated Range class to the more specific AddrRange. In doing so it changes the obvious Range<Addr> to AddrRange, and also bumps the range_map to be AddrRangeMap. In addition to the obvious changes, including the removal of redundant includes, this patch also does some house keeping in preparing for the introduction of address interleaving support in the ranges. The Range class is also stripped of all the functionality that is never used. --HG-- rename : src/base/range.hh => src/base/addr_range.hh rename : src/base/range_map.hh => src/base/addr_range_map.hh
515 lines
17 KiB
C++
515 lines
17 KiB
C++
/*
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* Copyright (c) 2011-2012 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ali Saidi
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* Andreas Hansson
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* William Wang
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*/
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/**
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* @file
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* Definition of a bus object.
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*/
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#include "base/misc.hh"
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#include "base/trace.hh"
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#include "debug/Bus.hh"
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#include "debug/BusAddrRanges.hh"
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#include "debug/Drain.hh"
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#include "mem/bus.hh"
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BaseBus::BaseBus(const BaseBusParams *p)
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: MemObject(p),
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headerCycles(p->header_cycles), width(p->width),
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defaultPortID(InvalidPortID),
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useDefaultRange(p->use_default_range),
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defaultBlockSize(p->block_size),
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cachedBlockSize(0), cachedBlockSizeValid(false)
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{
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//width, clock period, and header cycles must be positive
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if (width <= 0)
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fatal("Bus width must be positive\n");
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if (clock <= 0)
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fatal("Bus clock period must be positive\n");
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if (headerCycles <= 0)
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fatal("Number of header cycles must be positive\n");
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}
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BaseBus::~BaseBus()
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{
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for (MasterPortIter m = masterPorts.begin(); m != masterPorts.end();
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++m) {
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delete *m;
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}
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for (SlavePortIter s = slavePorts.begin(); s != slavePorts.end();
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++s) {
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delete *s;
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}
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}
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MasterPort &
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BaseBus::getMasterPort(const std::string &if_name, int idx)
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{
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if (if_name == "master" && idx < masterPorts.size()) {
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// the master port index translates directly to the vector position
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return *masterPorts[idx];
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} else if (if_name == "default") {
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return *masterPorts[defaultPortID];
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} else {
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return MemObject::getMasterPort(if_name, idx);
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}
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}
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SlavePort &
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BaseBus::getSlavePort(const std::string &if_name, int idx)
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{
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if (if_name == "slave" && idx < slavePorts.size()) {
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// the slave port index translates directly to the vector position
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return *slavePorts[idx];
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} else {
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return MemObject::getSlavePort(if_name, idx);
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}
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}
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Tick
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BaseBus::calcPacketTiming(PacketPtr pkt)
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{
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// determine the current time rounded to the closest following
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// clock edge
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Tick now = nextCycle();
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Tick headerTime = now + headerCycles * clock;
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// The packet will be sent. Figure out how long it occupies the bus, and
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// how much of that time is for the first "word", aka bus width.
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int numCycles = 0;
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if (pkt->hasData()) {
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// If a packet has data, it needs ceil(size/width) cycles to send it
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int dataSize = pkt->getSize();
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numCycles += dataSize/width;
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if (dataSize % width)
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numCycles++;
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}
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// The first word will be delivered after the current tick, the delivery
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// of the address if any, and one bus cycle to deliver the data
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pkt->firstWordTime = headerTime + clock;
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pkt->finishTime = headerTime + numCycles * clock;
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return headerTime;
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}
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template <typename PortClass>
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BaseBus::Layer<PortClass>::Layer(BaseBus& _bus, const std::string& _name,
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Tick _clock) :
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bus(_bus), _name(_name), state(IDLE), clock(_clock), drainEvent(NULL),
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releaseEvent(this)
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{
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}
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template <typename PortClass>
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void BaseBus::Layer<PortClass>::occupyLayer(Tick until)
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{
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// ensure the state is busy or in retry and never idle at this
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// point, as the bus should transition from idle as soon as it has
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// decided to forward the packet to prevent any follow-on calls to
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// sendTiming seeing an unoccupied bus
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assert(state != IDLE);
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// note that we do not change the bus state here, if we are going
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// from idle to busy it is handled by tryTiming, and if we
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// are in retry we should remain in retry such that
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// succeededTiming still sees the accurate state
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// until should never be 0 as express snoops never occupy the bus
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assert(until != 0);
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bus.schedule(releaseEvent, until);
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DPRINTF(BaseBus, "The bus is now busy from tick %d to %d\n",
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curTick(), until);
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}
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template <typename PortClass>
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bool
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BaseBus::Layer<PortClass>::tryTiming(PortClass* port)
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{
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// first we see if the bus is busy, next we check if we are in a
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// retry with a port other than the current one
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if (state == BUSY || (state == RETRY && port != retryList.front())) {
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// put the port at the end of the retry list
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retryList.push_back(port);
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return false;
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}
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// update the state which is shared for request, response and
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// snoop responses, if we were idle we are now busy, if we are in
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// a retry, then do not change
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if (state == IDLE)
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state = BUSY;
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return true;
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}
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template <typename PortClass>
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void
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BaseBus::Layer<PortClass>::succeededTiming(Tick busy_time)
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{
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// if a retrying port succeeded, also take it off the retry list
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if (state == RETRY) {
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DPRINTF(BaseBus, "Remove retry from list %s\n",
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retryList.front()->name());
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retryList.pop_front();
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state = BUSY;
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}
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// we should either have gone from idle to busy in the
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// tryTiming test, or just gone from a retry to busy
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assert(state == BUSY);
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// occupy the bus accordingly
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occupyLayer(busy_time);
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}
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template <typename PortClass>
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void
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BaseBus::Layer<PortClass>::failedTiming(PortClass* port, Tick busy_time)
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{
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// if we are not in a retry, i.e. busy (but never idle), or we are
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// in a retry but not for the current port, then add the port at
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// the end of the retry list
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if (state != RETRY || port != retryList.front()) {
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retryList.push_back(port);
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}
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// even if we retried the current one and did not succeed,
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// we are no longer retrying but instead busy
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state = BUSY;
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// occupy the bus accordingly
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occupyLayer(busy_time);
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}
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template <typename PortClass>
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void
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BaseBus::Layer<PortClass>::releaseLayer()
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{
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// releasing the bus means we should now be idle
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assert(state == BUSY);
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assert(!releaseEvent.scheduled());
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// update the state
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state = IDLE;
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// bus is now idle, so if someone is waiting we can retry
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if (!retryList.empty()) {
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// note that we block (return false on recvTiming) both
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// because the bus is busy and because the destination is
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// busy, and in the latter case the bus may be released before
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// we see a retry from the destination
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retryWaiting();
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} else if (drainEvent) {
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DPRINTF(Drain, "Bus done draining, processing drain event\n");
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//If we weren't able to drain before, do it now.
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drainEvent->process();
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// Clear the drain event once we're done with it.
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drainEvent = NULL;
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}
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}
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template <typename PortClass>
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void
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BaseBus::Layer<PortClass>::retryWaiting()
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{
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// this should never be called with an empty retry list
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assert(!retryList.empty());
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// we always go to retrying from idle
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assert(state == IDLE);
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// update the state which is shared for request, response and
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// snoop responses
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state = RETRY;
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// note that we might have blocked on the receiving port being
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// busy (rather than the bus itself) and now call retry before the
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// destination called retry on the bus
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retryList.front()->sendRetry();
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// If the bus is still in the retry state, sendTiming wasn't
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// called in zero time (e.g. the cache does this)
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if (state == RETRY) {
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retryList.pop_front();
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//Burn a cycle for the missed grant.
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// update the state which is shared for request, response and
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// snoop responses
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state = BUSY;
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// determine the current time rounded to the closest following
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// clock edge
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Tick now = bus.nextCycle();
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occupyLayer(now + clock);
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}
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}
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template <typename PortClass>
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void
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BaseBus::Layer<PortClass>::recvRetry()
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{
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// we got a retry from a peer that we tried to send something to
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// and failed, but we sent it on the account of someone else, and
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// that source port should be on our retry list, however if the
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// bus layer is released before this happens and the retry (from
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// the bus point of view) is successful then this no longer holds
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// and we could in fact have an empty retry list
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if (retryList.empty())
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return;
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// if the bus layer is idle
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if (state == IDLE) {
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// note that we do not care who told us to retry at the moment, we
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// merely let the first one on the retry list go
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retryWaiting();
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}
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}
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PortID
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BaseBus::findPort(Addr addr)
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{
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/* An interval tree would be a better way to do this. --ali. */
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PortID dest_id = checkPortCache(addr);
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if (dest_id != InvalidPortID)
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return dest_id;
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// Check normal port ranges
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PortMapConstIter i = portMap.find(RangeSize(addr,1));
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if (i != portMap.end()) {
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dest_id = i->second;
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updatePortCache(dest_id, i->first.start, i->first.end);
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return dest_id;
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}
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// Check if this matches the default range
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if (useDefaultRange) {
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AddrRangeConstIter a_end = defaultRange.end();
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for (AddrRangeConstIter i = defaultRange.begin(); i != a_end; i++) {
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if (*i == addr) {
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DPRINTF(BusAddrRanges, " found addr %#llx on default\n",
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addr);
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return defaultPortID;
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}
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}
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} else if (defaultPortID != InvalidPortID) {
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DPRINTF(BusAddrRanges, "Unable to find destination for addr %#llx, "
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"will use default port\n", addr);
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return defaultPortID;
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}
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// we should use the range for the default port and it did not
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// match, or the default port is not set
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fatal("Unable to find destination for addr %#llx on bus %s\n", addr,
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name());
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}
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/** Function called by the port when the bus is receiving a range change.*/
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void
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BaseBus::recvRangeChange(PortID master_port_id)
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{
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AddrRangeIter iter;
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if (inRecvRangeChange.count(master_port_id))
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return;
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inRecvRangeChange.insert(master_port_id);
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DPRINTF(BusAddrRanges, "received RangeChange from device id %d\n",
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master_port_id);
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clearPortCache();
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if (master_port_id == defaultPortID) {
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defaultRange.clear();
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// Only try to update these ranges if the user set a default responder.
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if (useDefaultRange) {
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// get the address ranges of the connected slave port
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AddrRangeList ranges =
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masterPorts[master_port_id]->getAddrRanges();
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for(iter = ranges.begin(); iter != ranges.end(); iter++) {
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defaultRange.push_back(*iter);
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DPRINTF(BusAddrRanges, "Adding range %#llx - %#llx for default range\n",
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iter->start, iter->end);
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}
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}
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} else {
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assert(master_port_id < masterPorts.size() && master_port_id >= 0);
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MasterPort *port = masterPorts[master_port_id];
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// Clean out any previously existent ids
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for (PortMapIter portIter = portMap.begin();
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portIter != portMap.end(); ) {
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if (portIter->second == master_port_id)
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portMap.erase(portIter++);
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else
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portIter++;
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}
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// get the address ranges of the connected slave port
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AddrRangeList ranges = port->getAddrRanges();
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for (iter = ranges.begin(); iter != ranges.end(); iter++) {
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DPRINTF(BusAddrRanges, "Adding range %#llx - %#llx for id %d\n",
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iter->start, iter->end, master_port_id);
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if (portMap.insert(*iter, master_port_id) == portMap.end()) {
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PortID conflict_id = portMap.find(*iter)->second;
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fatal("%s has two ports with same range:\n\t%s\n\t%s\n",
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name(),
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masterPorts[master_port_id]->getSlavePort().name(),
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masterPorts[conflict_id]->getSlavePort().name());
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}
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}
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}
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DPRINTF(BusAddrRanges, "port list has %d entries\n", portMap.size());
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// tell all our neighbouring master ports that our address range
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// has changed
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for (SlavePortConstIter p = slavePorts.begin(); p != slavePorts.end();
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++p)
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(*p)->sendRangeChange();
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inRecvRangeChange.erase(master_port_id);
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}
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AddrRangeList
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BaseBus::getAddrRanges() const
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{
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AddrRangeList ranges;
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DPRINTF(BusAddrRanges, "received address range request, returning:\n");
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for (AddrRangeConstIter dflt_iter = defaultRange.begin();
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dflt_iter != defaultRange.end(); dflt_iter++) {
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ranges.push_back(*dflt_iter);
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DPRINTF(BusAddrRanges, " -- Dflt: %#llx : %#llx\n",dflt_iter->start,
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dflt_iter->end);
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}
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for (PortMapConstIter portIter = portMap.begin();
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portIter != portMap.end(); portIter++) {
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bool subset = false;
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for (AddrRangeConstIter dflt_iter = defaultRange.begin();
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dflt_iter != defaultRange.end(); dflt_iter++) {
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if ((portIter->first.start < dflt_iter->start &&
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portIter->first.end >= dflt_iter->start) ||
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(portIter->first.start < dflt_iter->end &&
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portIter->first.end >= dflt_iter->end))
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fatal("Devices can not set ranges that itersect the default set\
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but are not a subset of the default set.\n");
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if (portIter->first.start >= dflt_iter->start &&
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portIter->first.end <= dflt_iter->end) {
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subset = true;
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DPRINTF(BusAddrRanges, " -- %#llx : %#llx is a SUBSET\n",
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portIter->first.start, portIter->first.end);
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}
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}
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if (!subset) {
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ranges.push_back(portIter->first);
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DPRINTF(BusAddrRanges, " -- %#llx : %#llx\n",
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portIter->first.start, portIter->first.end);
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}
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}
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return ranges;
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}
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unsigned
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BaseBus::findBlockSize()
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{
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if (cachedBlockSizeValid)
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return cachedBlockSize;
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unsigned max_bs = 0;
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for (MasterPortConstIter m = masterPorts.begin(); m != masterPorts.end();
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++m) {
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unsigned tmp_bs = (*m)->peerBlockSize();
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if (tmp_bs > max_bs)
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max_bs = tmp_bs;
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}
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for (SlavePortConstIter s = slavePorts.begin(); s != slavePorts.end();
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++s) {
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unsigned tmp_bs = (*s)->peerBlockSize();
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if (tmp_bs > max_bs)
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max_bs = tmp_bs;
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}
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if (max_bs == 0)
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max_bs = defaultBlockSize;
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if (max_bs != 64)
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warn_once("Blocksize found to not be 64... hmm... probably not.\n");
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cachedBlockSize = max_bs;
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cachedBlockSizeValid = true;
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return max_bs;
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}
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template <typename PortClass>
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unsigned int
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BaseBus::Layer<PortClass>::drain(Event * de)
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{
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//We should check that we're not "doing" anything, and that noone is
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//waiting. We might be idle but have someone waiting if the device we
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//contacted for a retry didn't actually retry.
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if (!retryList.empty() || state != IDLE) {
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DPRINTF(Drain, "Bus not drained\n");
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drainEvent = de;
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return 1;
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}
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return 0;
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}
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/**
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* Bus layer template instantiations. Could be removed with _impl.hh
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* file, but since there are only two given options (MasterPort and
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* SlavePort) it seems a bit excessive at this point.
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*/
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template class BaseBus::Layer<SlavePort>;
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template class BaseBus::Layer<MasterPort>;
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