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isa
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Add code to generate register and immediate based integer op microop classes.
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2007-03-29 00:49:53 -07:00 |
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linux
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Get X86 to load an elf and start a process for it.
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2007-03-06 15:42:30 +00:00 |
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arguments.hh
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Add build hooks for x86.
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2007-03-03 16:01:48 +00:00 |
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faults.hh
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Added fault generation functions. I would still like to see these go away. The page table fault should be moved into sim/faults.hh because it's a "fake" m5 fault for se mode and shouldn't vary between architectures.
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2007-03-05 16:07:01 +00:00 |
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floatregfile.cc
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Add some new source files.
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2007-03-05 17:56:26 +00:00 |
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floatregfile.hh
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Reorganize the floating point register file a little.
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2007-03-05 17:57:26 +00:00 |
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interrupts.hh
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Add build hooks for x86.
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2007-03-03 16:01:48 +00:00 |
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intregfile.cc
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Add some new source files.
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2007-03-05 17:56:26 +00:00 |
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intregfile.hh
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put the int register count in intregs.hh
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2007-03-21 21:04:54 +00:00 |
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intregs.hh
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put the int register count in intregs.hh
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2007-03-21 21:04:54 +00:00 |
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isa_traits.hh
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Get X86 to load an elf and start a process for it.
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2007-03-06 15:42:30 +00:00 |
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kernel_stats.hh
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Add build hooks for x86.
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2007-03-03 16:01:48 +00:00 |
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locked_mem.hh
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Stub implementation for x86
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2007-03-05 16:08:18 +00:00 |
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miscregfile.cc
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Merge zizzer:/bk/newmem
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2007-03-07 15:04:44 -05:00 |
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miscregfile.hh
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*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
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2007-03-07 15:04:31 -05:00 |
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mmaped_ipr.hh
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Stub implementation for x86.
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2007-03-05 16:09:09 +00:00 |
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pagetable.hh
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Add some new source files.
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2007-03-05 17:56:26 +00:00 |
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predecoder.cc
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Break out the one and two byte opcodes into different files. Also change what bits decode is done on to reflect where clumps of instructions are.
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2007-03-21 19:19:53 +00:00 |
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predecoder.hh
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Break out the one and two byte opcodes into different files. Also change what bits decode is done on to reflect where clumps of instructions are.
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2007-03-21 19:19:53 +00:00 |
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predecoder_tables.cc
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Break out the one and two byte opcodes into different files. Also change what bits decode is done on to reflect where clumps of instructions are.
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2007-03-21 19:19:53 +00:00 |
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process.cc
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Get X86 to load an elf and start a process for it.
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2007-03-06 15:42:30 +00:00 |
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process.hh
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Get X86 to load an elf and start a process for it.
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2007-03-06 15:42:30 +00:00 |
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regfile.cc
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*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
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2007-03-07 15:04:31 -05:00 |
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regfile.hh
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*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
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2007-03-07 15:04:31 -05:00 |
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remote_gdb.cc
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Add some new source files.
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2007-03-05 17:56:26 +00:00 |
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remote_gdb.hh
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Add in NumGDBRegs so the constructor to the base class can get all it's arguments.
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2007-03-05 17:58:15 +00:00 |
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SConscript
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Split the x86 "process" predecoder method into it's own file.
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2007-03-15 19:16:37 +00:00 |
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SConsopts
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Rework the way SCons recurses into subdirectories, making it
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2007-03-10 23:00:54 -08:00 |
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stacktrace.hh
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Filled in a stub header file for a stacktrace object. I'm still not sure what this is for, and it probably doesn't work on anything but Alpha.
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2007-03-05 14:52:28 +00:00 |
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syscallreturn.hh
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Filled in a stub header file for setting the result of a syscall.
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2007-03-05 14:53:15 +00:00 |
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tlb.hh
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Add build hooks for x86.
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2007-03-03 16:01:48 +00:00 |
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types.hh
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Break out the one and two byte opcodes into different files. Also change what bits decode is done on to reflect where clumps of instructions are.
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2007-03-21 19:19:53 +00:00 |
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utility.hh
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Compile fix
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2007-03-15 03:17:00 +00:00 |
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vtophys.hh
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Fill out a stub version of the vtophys header file.
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2007-03-05 17:59:04 +00:00 |
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x86_traits.hh
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A new file for x86 specific parameters. This could be implemented as a sim object?
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2007-03-05 12:19:54 +00:00 |
