gem5/tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout

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M5 Simulator System
Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved
M5 compiled Feb 25 2010 03:11:27
M5 revision 1a33ca29ec29 6980 default share-aware-test-update.patch tip qtip
M5 started Feb 25 2010 03:38:00
M5 executing on SC2B0619
command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/o3-timing -re tests/run.py build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Begining test of difficult SPARC instructions...
LDSTUB: Passed
SWAP: Passed
CAS FAIL: Passed
CAS WORK: Passed
CASX FAIL: Passed
CASX WORK: Passed
LDTX: Passed
LDTW: Passed
STTW: Passed
Done
Exiting @ tick 27756500 because target called exit()