e410a925df
Make instructions observe segment prefixes, default segment rules, segment base addresses. Also fix some microcode and add sib and riprel "keywords" to the x86 specialization of the microassembler. --HG-- extra : convert_revision : be5a3b33d33f243ed6e1ad63faea8495e46d0ac9
261 lines
9.8 KiB
C++
261 lines
9.8 KiB
C++
// -*- mode:c++ -*-
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// Copyright (c) 2007 The Hewlett-Packard Development Company
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// All rights reserved.
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//
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// Redistribution and use of this software in source and binary forms,
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// with or without modification, are permitted provided that the
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// following conditions are met:
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//
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// The software must be used only for Non-Commercial Use which means any
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// use which is NOT directed to receiving any direct monetary
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// compensation for, or commercial advantage from such use. Illustrative
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// examples of non-commercial use are academic research, personal study,
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// teaching, education and corporate research & development.
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// Illustrative examples of commercial use are distributing products for
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// commercial advantage and providing services using the software for
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// commercial advantage.
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//
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// If you wish to use this software or functionality therein that may be
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// covered by patents for commercial use, please contact:
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// Director of Intellectual Property Licensing
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// Office of Strategy and Technology
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// Hewlett-Packard Company
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// 1501 Page Mill Road
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// Palo Alto, California 94304
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//
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// Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer. Redistributions
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// in binary form must reproduce the above copyright notice, this list of
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// conditions and the following disclaimer in the documentation and/or
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// other materials provided with the distribution. Neither the name of
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// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission. No right of
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// sublicense is granted herewith. Derivatives of the software and
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// output created using the software may be prepared, but only for
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// Non-Commercial Uses. Derivatives of the software may be shared with
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// others provided: (i) the others agree to abide by the list of
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// conditions herein which includes the Non-Commercial Use restrictions;
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// and (ii) such Derivatives of the software include the above copyright
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// notice to acknowledge the contribution from this software where
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// applicable, this list of conditions and the disclaimer below.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Authors: Gabe Black
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//////////////////////////////////////////////////////////////////////////////
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//
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// Architecture independent
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//
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// Execute method for macroops.
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def template MacroExecPanic {{
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Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const
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{
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panic("Tried to execute macroop directly!");
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return NoFault;
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}
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}};
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output header {{
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// Base class for combinationally generated macroops
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class Macroop : public StaticInst
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{
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protected:
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const uint32_t numMicroops;
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//Constructor.
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Macroop(const char *mnem, ExtMachInst _machInst,
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uint32_t _numMicroops)
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: StaticInst(mnem, _machInst, No_OpClass),
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numMicroops(_numMicroops)
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{
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assert(numMicroops);
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microops = new StaticInstPtr[numMicroops];
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flags[IsMacroop] = true;
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}
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~Macroop()
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{
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delete [] microops;
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}
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StaticInstPtr * microops;
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StaticInstPtr fetchMicroop(MicroPC microPC)
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{
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assert(microPC < numMicroops);
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return microops[microPC];
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}
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std::string generateDisassembly(Addr pc,
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const SymbolTable *symtab) const
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{
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return mnemonic;
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}
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%(MacroExecPanic)s
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};
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}};
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//////////////////////////////////////////////////////////////////////////////
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//
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// X86 specific
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//
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//////////////////////////////////////////////////////////////////////////////
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// Basic instruction class declaration template.
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def template MacroDeclare {{
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namespace X86Macroop
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{
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/**
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* Static instruction class for "%(mnemonic)s".
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*/
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class %(class_name)s : public %(base_class)s
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{
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public:
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// Constructor.
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%(class_name)s(ExtMachInst machInst, X86ISA::EmulEnv env);
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};
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};
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}};
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// Basic instruction class constructor template.
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def template MacroConstructor {{
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inline X86Macroop::%(class_name)s::%(class_name)s(
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ExtMachInst machInst, EmulEnv env)
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: %(base_class)s("%(mnemonic)s", machInst, %(num_microops)s)
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{
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%(adjust_env)s;
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%(do_modrm)s;
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%(constructor)s;
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//alloc_microops is the code that sets up the microops
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//array in the parent class.
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%(alloc_microops)s;
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}
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}};
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let {{
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from micro_asm import Combinational_Macroop, Rom_Macroop
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class X86Macroop(Combinational_Macroop):
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def setAdjustEnv(self, val):
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self.adjust_env = val
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def __init__(self, name):
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super(X86Macroop, self).__init__(name)
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self.directives = {
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"adjust_env" : self.setAdjustEnv
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}
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self.declared = False
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self.adjust_env = ""
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self.doModRM = ""
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def getAllocator(self, env):
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return "new X86Macroop::%s(machInst, %s)" % (self.name, env.getAllocator())
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def getDeclaration(self):
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#FIXME This first parameter should be the mnemonic. I need to
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#write some code which pulls that out
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iop = InstObjParams(self.name, self.name, "Macroop", {"code" : ""})
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return MacroDeclare.subst(iop);
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def getDefinition(self):
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#FIXME This first parameter should be the mnemonic. I need to
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#write some code which pulls that out
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numMicroops = len(self.microops)
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allocMicroops = ''
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micropc = 0
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for op in self.microops:
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allocMicroops += \
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"microops[%d] = %s;\n" % \
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(micropc, op.getAllocator(True, False,
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micropc == 0,
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micropc == numMicroops - 1))
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micropc += 1
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iop = InstObjParams(self.name, self.name, "Macroop",
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{"code" : "", "num_microops" : numMicroops,
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"alloc_microops" : allocMicroops,
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"adjust_env" : self.adjust_env,
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"do_modrm" : self.doModRM})
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return MacroConstructor.subst(iop);
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}};
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let {{
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class EmulEnv(object):
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def __init__(self):
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self.reg = "0"
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self.regUsed = False
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self.regm = "0"
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self.regmUsed = False
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self.seg = "SEGMENT_REG_DS"
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self.size = None
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self.addressSize = "ADDRSIZE"
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self.dataSize = "OPSIZE"
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self.stackSize = "STACKSIZE"
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self.doModRM = False
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def getAllocator(self):
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if self.size == 'b':
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self.dataSize = 1
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elif self.size == 'd':
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self.dataSize = 4
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elif self.size == 'q':
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self.dataSize = 8
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elif self.size == 'v':
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self.dataSize = "OPSIZE"
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elif self.size == 'w':
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self.dataSize = 2
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elif self.size == 'z':
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self.dataSize = "((OPSIZE == 8) ? 4 : OPSIZE)"
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elif self.size:
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raise Exception, "Unrecognized size type %s!" % self.size
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return '''EmulEnv(%(reg)s,
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%(regm)s,
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%(dataSize)s,
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%(addressSize)s,
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%(stackSize)s)''' % \
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self.__dict__
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def addReg(self, reg):
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if not self.regUsed:
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self.reg = reg
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self.regUsed = True
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elif not self.regmUsed:
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self.regm = reg
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self.regmUsed = True
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else:
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raise Exception, "EmulEnv is out of register specialization spots."
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def setSize(self, size):
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if not self.size:
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self.size = size
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else:
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if self.size is not size:
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raise Exception, "Conflicting register sizes %s and %s!" %\
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(self.size, size)
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}};
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let {{
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doModRMString = "env.doModRM(machInst);\n"
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def genMacroop(Name, env):
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blocks = OutputBlocks()
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if not macroopDict.has_key(Name):
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raise Exception, "Unrecognized instruction: %s" % Name
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macroop = macroopDict[Name]
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if not macroop.declared:
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if env.doModRM:
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macroop.doModRM = doModRMString
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blocks.header_output = macroop.getDeclaration()
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blocks.decoder_output = macroop.getDefinition()
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macroop.declared = True
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blocks.decode_block = "return %s;\n" % macroop.getAllocator(env)
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return blocks
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}};
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