gem5/src/arch
Nathan Binkert 8153790d00 SCons: centralize the Dir() workaround for newer versions of scons.
Scons bug id: 2006 M5 Bug id: 308
2009-01-13 14:17:50 -08:00
..
alpha Make Alpha pseudo-insts available from SE mode. 2008-12-17 09:51:18 -08:00
mips SCons: centralize the Dir() workaround for newer versions of scons. 2009-01-13 14:17:50 -08:00
sparc SCons: centralize the Dir() workaround for newer versions of scons. 2009-01-13 14:17:50 -08:00
x86 SCons: centralize the Dir() workaround for newer versions of scons. 2009-01-13 14:17:50 -08:00
isa_parser.py style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
isa_specific.hh style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
micro_asm.py Microcode: Fix a silent typo error in the microcode assembler. 2008-10-09 00:07:38 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript CPU: Create a microcode ROM object in the CPU which is defined by the ISA. 2008-10-12 15:59:21 -07:00