9c20880fb5
This patch provides the example test script to configure different HMC architecture and run traffic through traffic generator. Committed by Jason Lowe-Power <jason@lowepower.com>
170 lines
5.7 KiB
Python
170 lines
5.7 KiB
Python
import optparse
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import sys
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import subprocess
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import m5
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from m5.objects import *
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from m5.util import addToPath
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addToPath('../common')
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import MemConfig
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import HMC
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parser = optparse.OptionParser()
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# Use a HMC_2500_x32 by default
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parser.add_option("--mem-type", type = "choice", default = "HMC_2500_x32",
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choices = MemConfig.mem_names(),
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help = "type of memory to use")
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parser.add_option("--ranks", "-r", type = "int", default = 1,
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help = "Number of ranks to iterate across")
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parser.add_option("--rd_perc", type ="int", default=100,
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help = "Percentage of read commands")
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parser.add_option("--mode", type ="choice", default ="DRAM",
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choices = ["DRAM", "DRAM_ROTATE", "RANDOM"],
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help = "DRAM: Random traffic; \
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DRAM_ROTATE: Traffic rotating across banks and ranks"
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)
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parser.add_option("--addr_map", type ="int", default = 1,
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help = "0: RoCoRaBaCh; 1: RoRaBaCoCh/RoRaBaChCo")
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parser.add_option("--arch", type = "choice", default = "distributed",
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choices = ["same", "distributed", "mixed"],
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help = "same: HMC-4 links with same range\
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distributed: HMC-4 links with distributed range\
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mixed: mixed with same & distributed range")
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parser.add_option("--linkaggr", type = "int", default = 0,
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help = "1: enable link crossbar, 0: disable link crossbar")
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parser.add_option("--num_cross", type = "int", default = 4,
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help = "1: number of crossbar in HMC=1;\
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4: number of crossbar = 4")
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parser.add_option("--tlm-memory", type = "string",
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help="use external port for SystemC TLM cosimulation")
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parser.add_option("--elastic-trace-en", action ="store_true",
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help = """Enable capture of data dependency and instruction
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fetch traces using elastic trace probe.""")
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(options, args) = parser.parse_args()
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if args:
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print "Error: script doesn't take any positional arguments"
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sys.exit(1)
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system = System()
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system.clk_domain = SrcClockDomain(clock='100GHz',
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voltage_domain=
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VoltageDomain(voltage = '1V'))
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# Create additional crossbar for arch1
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if options.arch == "distributed" or options.arch == "mixed" :
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system.membus = NoncoherentXBar( width=8 )
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system.membus.badaddr_responder = BadAddr()
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system.membus.default = Self.badaddr_responder.pio
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system.membus.width = 8
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system.membus.frontend_latency = 3
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system.membus.forward_latency = 4
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system.membus.response_latency = 2
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system.membus.clk_domain = SrcClockDomain(clock='100GHz', voltage_domain=
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VoltageDomain(voltage = '1V'))
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# we are considering 4GB HMC device with following parameters
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# hmc_device_size = '4GB'
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# hmc_num_vaults = 16
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# hmc_vault_size = '256MB'
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# hmc_stack_size = 8
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# hmc_bank_in_stack = 2
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# hmc_bank_size = '16MB'
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# hmc_bank_in_vault = 16
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# determine the burst length in bytes
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burst_size = 256
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num_serial_links = 4
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num_vault_ctrl = 16
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options.mem_channels = 1
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options.external_memory_system = 0
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options.mem_ranks=1
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stride_size = burst_size
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system.cache_line_size = burst_size
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# Enable performance monitoring
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options.enable_global_monitor = True
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options.enable_link_monitor = False
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# Bytes used for calculations
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oneGBytes = 1024 * 1024 * 1024
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oneMBytes = 1024 * 1024
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# Memory ranges of 16 vault controller - Total_HMC_size / 16
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mem_range_vault = [ AddrRange(i * 256 * oneMBytes, ((i + 1) * 256 * oneMBytes)
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- 1)
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for i in range(num_vault_ctrl)]
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# Memmory ranges of serial link for arch-0
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# Same as the ranges of vault controllers - 4 vault - to - 1 serial link
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if options.arch == "same":
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ser_range = [ AddrRange(0, (4 * oneGBytes) - 1)
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for i in range(num_serial_links)]
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options.ser_ranges = ser_range
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# Memmory ranges of serial link for arch-1
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# Distributed range accross links
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if options.arch == "distributed":
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ser_range = [ AddrRange(i * oneGBytes, ((i + 1) * oneGBytes) - 1)
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for i in range(num_serial_links)]
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options.ser_ranges = ser_range
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# Memmory ranges of serial link for arch-2
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# "Mixed" address distribution over links
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if options.arch == "mixed":
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ser_range0 = AddrRange(0 , (1 * oneGBytes) - 1)
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ser_range1 = AddrRange(1 * oneGBytes , (2 * oneGBytes) - 1)
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ser_range2 = AddrRange(0 , (4 * oneGBytes) - 1)
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ser_range3 = AddrRange(0 , (4 * oneGBytes) - 1)
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options.ser_ranges = [ser_range0, ser_range1, ser_range2, ser_range3]
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# Assign ranges of vault controller to system ranges
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system.mem_ranges = mem_range_vault
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# open traffic generator
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cfg_file_name = "./tests/quick/se/70.tgen/traffic.cfg"
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cfg_file = open(cfg_file_name, 'r')
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# number of traffic generator
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np = 4
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# create a traffic generator, and point it to the file we just created
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system.tgen = [ TrafficGen(config_file = cfg_file_name) for i in xrange(np)]
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# Config memory system with given HMC arch
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MemConfig.config_mem(options, system)
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if options.arch == "distributed":
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for i in xrange(np):
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system.tgen[i].port = system.membus.slave
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# connect the system port even if it is not used in this example
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system.system_port = system.membus.slave
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if options.arch == "mixed":
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for i in xrange(int(np/2)):
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system.tgen[i].port = system.membus.slave
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# connect the system port even if it is not used in this example
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system.system_port = system.membus.slave
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# run Forrest, run!
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root = Root(full_system = False, system = system)
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root.system.mem_mode = 'timing'
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m5.instantiate()
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m5.simulate(10000000000)
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m5.stats.dump()
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print "Done!"
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