139 lines
4.7 KiB
C++
139 lines
4.7 KiB
C++
/*
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* Copyright (c) 2009 Princeton University
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* Copyright (c) 2009 The Regents of the University of California
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Hangsheng Wang (Orion 1.0, Princeton)
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* Xinping Zhu (Orion 1.0, Princeton)
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* Xuning Chen (Orion 1.0, Princeton)
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* Bin Li (Orion 2.0, Princeton)
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* Kambiz Samadi (Orion 2.0, UC San Diego)
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*/
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#include <cassert>
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#include <iostream>
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#include "mem/ruby/network/orion/FlipFlop.hh"
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#include "mem/ruby/network/orion/TechParameter.hh"
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using namespace std;
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FlipFlop::FlipFlop(
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const string& ff_model_str_,
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double load_,
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const TechParameter* tech_param_ptr_
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)
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{
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if (ff_model_str_ == string("NEG_DFF"))
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{
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m_ff_model = NEG_DFF;
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}
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else
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{
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m_ff_model = NO_MODEL;
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}
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if (m_ff_model != NO_MODEL)
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{
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assert(load_ == load_);
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m_load = load_;
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m_tech_param_ptr = tech_param_ptr_;
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init();
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}
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}
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FlipFlop::~FlipFlop()
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{}
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void FlipFlop::init()
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{
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double c1, c2, c3, c4, c5, c6;
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double e_factor = m_tech_param_ptr->get_EnergyFactor();
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switch(m_ff_model)
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{
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case NEG_DFF:
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c1 = c5 = c6 = calc_node_cap(2, 1);
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c2 = calc_node_cap(2, 3);
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c3 = calc_node_cap(3, 2);
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c4 = calc_node_cap(2, 3);
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m_e_switch = (c1+c2+c3+c4+c5+c6+m_load)*e_factor/2.0;
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// no 1/2 for e_keep and e_clock because clock signal switches twice in one cycle
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m_e_keep_1 = c3*e_factor;
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m_e_keep_0 = c2*e_factor;
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m_e_clock = calc_clock_cap()*e_factor;
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m_i_static = calc_i_static();
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break;
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default:
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cerr << "error" << endl;
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}
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return;
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}
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//this model is based on the gate-level design given by Randy H. Katz "Contemporary Logic Design"
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//Figure 6.24, node numbers (1-6) are assigned to all gate outputs, left to right, top to bottom
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//
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//We should have pure cap functions and leave the decision of whether or not to have coefficient
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//1/2 in init function.
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double FlipFlop::calc_node_cap(uint32_t num_fanin_, uint32_t num_fanout_)
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{
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double total_cap = 0;
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//FIXME: all need actual size
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//part 1: drain cap of NOR gate
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double WdecNORn = m_tech_param_ptr->get_WdecNORn();
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double WdecNORp = m_tech_param_ptr->get_WdecNORp();
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total_cap += num_fanin_*m_tech_param_ptr->calc_draincap(WdecNORn, TechParameter::NCH, 1) + m_tech_param_ptr->calc_draincap(WdecNORp, TechParameter::PCH, num_fanin_);
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//part 2: gate cap of NOR gate
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total_cap += num_fanout_*m_tech_param_ptr->calc_gatecap(WdecNORn+WdecNORp, 0);
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return total_cap;
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}
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double FlipFlop::calc_clock_cap()
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{
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double WdecNORn = m_tech_param_ptr->get_WdecNORn();
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double WdecNORp = m_tech_param_ptr->get_WdecNORp();
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return (2*m_tech_param_ptr->calc_gatecap(WdecNORn+WdecNORp, 0));
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}
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double FlipFlop::calc_i_static()
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{
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double WdecNORn = m_tech_param_ptr->get_WdecNORn();
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double WdecNORp = m_tech_param_ptr->get_WdecNORp();
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double NOR2_TAB_0 = m_tech_param_ptr->get_NOR2_TAB(0);
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double NOR2_TAB_1 = m_tech_param_ptr->get_NOR2_TAB(1);
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double NOR2_TAB_2 = m_tech_param_ptr->get_NOR2_TAB(2);
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double NOR2_TAB_3 = m_tech_param_ptr->get_NOR2_TAB(3);
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return (WdecNORp*NOR2_TAB_0 + WdecNORn*(NOR2_TAB_1+NOR2_TAB_2+NOR2_TAB_3))/4*6;
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}
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