4bf48a11ef
Debug flags are ExecUser, ExecKernel, and ExecAsid. ExecUser and ExecKernel are set by default when Exec is specified. Use minus sign with ExecUser or ExecKernel to remove user or kernel tracing respectively.
106 lines
3.1 KiB
C++
106 lines
3.1 KiB
C++
/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#ifndef __ARCH_SPARC_UTILITY_HH__
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#define __ARCH_SPARC_UTILITY_HH__
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#include "arch/sparc/isa_traits.hh"
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#include "arch/sparc/registers.hh"
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#include "arch/sparc/tlb.hh"
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#include "base/bitfield.hh"
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#include "base/misc.hh"
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#include "cpu/static_inst.hh"
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#include "cpu/thread_context.hh"
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#include "sim/fault_fwd.hh"
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namespace SparcISA
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{
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inline PCState
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buildRetPC(const PCState &curPC, const PCState &callPC)
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{
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PCState ret = callPC;
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ret.uEnd();
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ret.pc(curPC.npc());
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return ret;
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}
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uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
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static inline bool
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inUserMode(ThreadContext *tc)
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{
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return !((tc->readMiscRegNoEffect(MISCREG_PSTATE) & (1 << 2)) ||
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(tc->readMiscRegNoEffect(MISCREG_HPSTATE) & (1 << 2)));
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}
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/**
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* Function to insure ISA semantics about 0 registers.
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* @param tc The thread context.
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*/
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template <class TC>
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void zeroRegisters(TC *tc);
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void initCPU(ThreadContext *tc, int cpuId);
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inline void
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startupCPU(ThreadContext *tc, int cpuId)
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{
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#if FULL_SYSTEM
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// Other CPUs will get activated by IPIs
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if (cpuId == 0)
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tc->activate(0);
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#else
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tc->activate(0);
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#endif
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}
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void copyRegs(ThreadContext *src, ThreadContext *dest);
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void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
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void skipFunction(ThreadContext *tc);
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inline void
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advancePC(PCState &pc, const StaticInstPtr inst)
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{
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inst->advancePC(pc);
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}
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inline uint64_t
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getExecutingAsid(ThreadContext *tc)
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{
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return tc->readMiscRegNoEffect(MISCREG_MMU_P_CONTEXT);
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}
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} // namespace SparcISA
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#endif
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