46502851ab
configs/common/Benchmarks.py:
add annotate test app
src/SConscript:
add annotate.cc to lis
src/arch/alpha/isa/decoder.isa:
add annotate instructions
src/base/traceflags.py:
Add annotate trace flag
src/sim/pseudo_inst.cc:
src/sim/pseudo_inst.hh:
add annotate pseudo ops
util/m5/m5op.S:
util/m5/m5op.h:
add anotate ops
--HG--
extra : convert_revision : 7f965c0d84e41ce34f2ec8ec27a009276d67d8d6
59 lines
2.4 KiB
C
59 lines
2.4 KiB
C
/*
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* Copyright (c) 2003-2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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* Ali Saidi
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*/
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#ifndef __M5OP_H__
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#define __M5OP_H__
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#include <asm/types.h>
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void arm(uint64_t address);
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void quiesce(void);
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void quiesceNs(uint64_t ns);
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void quiesceCycle(uint64_t cycles);
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uint64_t quiesceTime(void);
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void m5_ivlb(uint64_t interval);
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void m5_ivle(uint64_t interval);
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void m5_exit(uint64_t ns_delay);
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uint64_t m5_initparam(void);
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void m5_checkpoint(uint64_t ns_delay, uint64_t ns_period);
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void m5_reset_stats(uint64_t ns_delay, uint64_t ns_period);
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void m5_dump_stats(uint64_t ns_delay, uint64_t ns_period);
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void m5_dumpreset_stats(uint64_t ns_delay, uint64_t ns_period);
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uint64_t m5_readfile(void *buffer, uint64_t len, uint64_t offset);
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void m5_debugbreak(void);
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void m5_switchcpu(void);
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void m5_addsymbol(uint64_t addr, char *symbol);
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void m5_panic(void);
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void m5_anbegin(uint64_t s);
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void m5_anwait(uint64_t s, uint64_t w);
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#endif // __M5OP_H__
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