f47c2f6415
The patch introduces two predicates for condition code registers -- one tests if a register needs to be read, the other tests whether a register needs to be written to. These predicates are evaluated twice -- during construction of the microop and during its execution. Register reads and writes are elided depending on how the predicates evaluate. |
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base.isa | ||
debug.isa | ||
fpop.isa | ||
ldstop.isa | ||
limmop.isa | ||
mediaop.isa | ||
microops.isa | ||
regop.isa | ||
seqop.isa | ||
specop.isa |