e0b065ff7c
This makes testing a bit easier.
arch/alpha/alpha_memory.cc:
cpu/intr_control.cc:
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
dev/alpha_console.cc:
dev/console.cc:
dev/disk_image.cc:
dev/etherbus.cc:
dev/etherdump.cc:
dev/etherlink.cc:
dev/ethertap.cc:
dev/simple_disk.cc:
kern/tru64/tru64_system.cc:
sim/main.cc:
sim/prog.cc:
Need to include builder.hh
sort #includes
sim/sim_object.cc:
sim/sim_object.hh:
Separate the SimObjectBuilder stuff into its own file
--HG--
extra : convert_revision : e8395e0cc6ae1f180f9cd6f100795a1ac44aeed5
80 lines
2.7 KiB
C++
80 lines
2.7 KiB
C++
/*
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* Copyright (c) 2003 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* @file
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* User Console Definitions
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*/
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#ifndef __SIM_OBJECT_HH__
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#define __SIM_OBJECT_HH__
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#include <map>
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#include <list>
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#include <vector>
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#include <iostream>
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#include "sim/param.hh"
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#include "sim/serialize.hh"
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/*
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* Abstract superclass for simulation objects. Represents things that
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* correspond to physical components and can be specified via the
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* config file (CPUs, caches, etc.).
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*/
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class SimObject : public Serializeable
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{
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private:
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friend class Serializer;
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typedef std::vector<SimObject *> SimObjectList;
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// list of all instantiated simulation objects
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static SimObjectList simObjectList;
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public:
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SimObject(const std::string &_name);
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virtual ~SimObject() {}
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// register statistics for this object
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virtual void regStats();
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virtual void regFormulas();
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// print extra results for this object not covered by registered
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// statistics (called at end of simulation)
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virtual void printExtraOutput(std::ostream&);
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// static: call reg_stats on all SimObjects
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static void regAllStats();
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// static: call printExtraOutput on all SimObjects
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static void printAllExtraOutput(std::ostream&);
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};
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#endif // __SIM_OBJECT_HH__
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