gem5/tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt
Steve Reinhardt f3976f9cd9 More regression updates.
Get rid of caches in simple-timing config for now.

tests/SConscript:
    another line for diff to ignore
tests/configs/simple-timing.py:
    turn off caches for now
tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt:
tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout:
tests/quick/00.hello/ref/sparc/linux/simple-atomic/m5stats.txt:
tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout:
    update for inst/tick rate (old one was debug?)
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.out:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stderr:
tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout:
    works now (no caches)

--HG--
extra : convert_revision : 472030f63297346976db6274a78235c93d4eef8e
2006-08-16 18:48:15 -04:00

18 lines
1.6 KiB
Text

---------- Begin Simulation Statistics ----------
host_inst_rate 199422 # Simulator instruction rate (inst/s)
host_mem_usage 147292 # Number of bytes of host memory used
host_seconds 0.03 # Real time elapsed on the host
host_tick_rate 196594 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 5657 # Number of instructions simulated
sim_seconds 0.000000 # Number of seconds simulated
sim_ticks 5656 # Number of ticks simulated
system.cpu.idle_fraction 0 # Percentage of idle cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.numCycles 5657 # number of cpu cycles simulated
system.cpu.num_insts 5657 # Number of instructions executed
system.cpu.num_refs 2055 # Number of memory references
system.cpu.workload.PROG:num_syscalls 13 # Number of system calls
---------- End Simulation Statistics ----------