f26a289295
This patch fixes a long-standing isue with the port flow control. Before this patch the retry mechanism was shared between all different packet classes. As a result, a snoop response could get stuck behind a request waiting for a retry, even if the send/recv functions were split. This caused message-dependent deadlocks in stress-test scenarios. The patch splits the retry into one per packet (message) class. Thus, sendTimingReq has a corresponding recvReqRetry, sendTimingResp has recvRespRetry etc. Most of the changes to the code involve simply clarifying what type of request a specific object was accepting. The biggest change in functionality is in the cache downstream packet queue, facing the memory. This queue was shared by requests and snoop responses, and it is now split into two queues, each with their own flow control, but the same physical MasterPort. These changes fixes the previously seen deadlocks.
210 lines
7 KiB
C++
210 lines
7 KiB
C++
/*
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* Copyright (c) 2011-2014 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ron Dreslinski
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* Ali Saidi
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* Andreas Hansson
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* William Wang
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*/
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/**
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* @file
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* Declaration of a non-coherent crossbar.
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*/
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#ifndef __MEM_NONCOHERENT_XBAR_HH__
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#define __MEM_NONCOHERENT_XBAR_HH__
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#include "mem/xbar.hh"
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#include "params/NoncoherentXBar.hh"
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/**
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* A non-coherent crossbar connects a number of non-snooping masters
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* and slaves, and routes the request and response packets based on
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* the address. The request packets issued by the master connected to
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* a non-coherent crossbar could still snoop in caches attached to a
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* coherent crossbar, as is the case with the I/O bus and memory bus
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* in most system configurations. No snoops will, however, reach any
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* master on the non-coherent crossbar itself.
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*
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* The non-coherent crossbar can be used as a template for modelling
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* PCIe, and non-coherent AMBA and OCP buses, and is typically used
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* for the I/O buses.
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*/
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class NoncoherentXBar : public BaseXBar
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{
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protected:
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/**
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* Declare the layers of this crossbar, one vector for requests
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* and one for responses.
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*/
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std::vector<ReqLayer*> reqLayers;
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std::vector<RespLayer*> respLayers;
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/**
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* Declaration of the non-coherent crossbar slave port type, one
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* will be instantiated for each of the master ports connecting to
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* the crossbar.
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*/
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class NoncoherentXBarSlavePort : public SlavePort
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{
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private:
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/** A reference to the crossbar to which this port belongs. */
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NoncoherentXBar &xbar;
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public:
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NoncoherentXBarSlavePort(const std::string &_name,
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NoncoherentXBar &_xbar, PortID _id)
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: SlavePort(_name, &_xbar, _id), xbar(_xbar)
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{ }
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protected:
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/**
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* When receiving a timing request, pass it to the crossbar.
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*/
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virtual bool recvTimingReq(PacketPtr pkt)
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{ return xbar.recvTimingReq(pkt, id); }
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/**
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* When receiving an atomic request, pass it to the crossbar.
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*/
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virtual Tick recvAtomic(PacketPtr pkt)
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{ return xbar.recvAtomic(pkt, id); }
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/**
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* When receiving a functional request, pass it to the crossbar.
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*/
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virtual void recvFunctional(PacketPtr pkt)
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{ xbar.recvFunctional(pkt, id); }
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/**
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* When receiving a retry, pass it to the crossbar.
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*/
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virtual void recvRespRetry()
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{ panic("Crossbar slave ports should never retry.\n"); }
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/**
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* Return the union of all adress ranges seen by this crossbar.
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*/
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virtual AddrRangeList getAddrRanges() const
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{ return xbar.getAddrRanges(); }
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};
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/**
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* Declaration of the crossbar master port type, one will be
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* instantiated for each of the slave ports connecting to the
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* crossbar.
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*/
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class NoncoherentXBarMasterPort : public MasterPort
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{
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private:
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/** A reference to the crossbar to which this port belongs. */
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NoncoherentXBar &xbar;
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public:
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NoncoherentXBarMasterPort(const std::string &_name,
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NoncoherentXBar &_xbar, PortID _id)
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: MasterPort(_name, &_xbar, _id), xbar(_xbar)
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{ }
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protected:
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/**
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* When receiving a timing response, pass it to the crossbar.
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*/
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virtual bool recvTimingResp(PacketPtr pkt)
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{ return xbar.recvTimingResp(pkt, id); }
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/** When reciving a range change from the peer port (at id),
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pass it to the crossbar. */
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virtual void recvRangeChange()
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{ xbar.recvRangeChange(id); }
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/** When reciving a retry from the peer port (at id),
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pass it to the crossbar. */
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virtual void recvReqRetry()
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{ xbar.recvReqRetry(id); }
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};
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/** Function called by the port when the crossbar is recieving a Timing
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request packet.*/
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virtual bool recvTimingReq(PacketPtr pkt, PortID slave_port_id);
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/** Function called by the port when the crossbar is recieving a Timing
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response packet.*/
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virtual bool recvTimingResp(PacketPtr pkt, PortID master_port_id);
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/** Timing function called by port when it is once again able to process
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* requests. */
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void recvReqRetry(PortID master_port_id);
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/** Function called by the port when the crossbar is recieving a Atomic
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transaction.*/
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Tick recvAtomic(PacketPtr pkt, PortID slave_port_id);
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/** Function called by the port when the crossbar is recieving a Functional
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transaction.*/
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void recvFunctional(PacketPtr pkt, PortID slave_port_id);
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public:
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NoncoherentXBar(const NoncoherentXBarParams *p);
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virtual ~NoncoherentXBar();
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unsigned int drain(DrainManager *dm);
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/**
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* stats
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*/
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virtual void regStats();
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Stats::Scalar totPktSize;
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};
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#endif //__MEM_NONCOHERENT_XBAR_HH__
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