This patch takes a first stab at recategorising the regression tests based on actual run times. The simple-atomic and simple-timing runs of vortex and twolf all finish in less than 180 s, and they are consequently moved from long to quick. All realview64 linux-boot regressions take more than 700 s, and they are therefore moved to long. Later patches will rename quick to short, and further divide the regressions into short, medium and long. --HG-- rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/config.ini rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/simerr rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/simout rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/stats.txt rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-dual/system.terminal rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/config.ini rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/simerr rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/simout rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/stats.txt rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic/system.terminal rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/config.ini rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simerr rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/simout rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/stats.txt rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing-dual/system.terminal rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/config.ini rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/simerr rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/simout rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/stats.txt rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-timing/system.terminal rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/config.ini rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/simerr rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/simout rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/stats.txt rename : tests/quick/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-atomic/system.terminal rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simerr => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simout => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/simout rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/smred.msg => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/smred.msg rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/smred.out => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/smred.out rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt => tests/quick/se/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simerr => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/simerr rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout => tests/quick/se/50.vortex/ref/alpha/tru64/simple-timing/simout rename : tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/smred.msg => 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tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.out => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.out rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pin => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pin rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl1 => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl1 rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl2 => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl2 rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.sav => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.sav rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.sv2 => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.sv2 rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.twf => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.twf rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt => tests/quick/se/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/config.ini => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/config.ini rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/simerr => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/simerr rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/simout => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/simout rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.out => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/smred.out rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pin => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pin rename : tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pl1 => tests/quick/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pl1 rename : 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tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/simerr => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/simerr rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/simout => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/simout rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.out => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.out rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pin => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pin rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl1 => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl1 rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl2 => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl2 rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sav => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sav rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sv2 => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sv2 rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.twf => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.twf rename : tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt => tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/config.ini => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/config.ini rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/simerr => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simerr rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/simout => 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tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.twf rename : tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt => tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/config.ini => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/config.ini rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/simerr => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/simerr rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/simout => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/simout rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.out => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.out rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.pin => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pin rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl1 => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl1 rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl2 => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl2 rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.sav => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.sav rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.sv2 => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.sv2 rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.twf => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.twf rename : tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt => tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/config.ini => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/config.ini rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/simerr => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/simerr rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/simout => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/simout rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.out => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.out rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pin => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pin rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pl1 => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pl1 rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pl2 => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pl2 rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.sav => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.sav rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.sv2 => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.sv2 rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.twf => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.twf rename : tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt => tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt rename : tests/long/se/70.twolf/test.py => tests/quick/se/70.twolf/test.py
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---------- Begin Simulation Statistics ----------
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sim_seconds 0.044221 # Number of seconds simulated
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sim_ticks 44221003000 # Number of ticks simulated
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final_tick 44221003000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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sim_freq 1000000000000 # Frequency of simulated ticks
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host_inst_rate 2813944 # Simulator instruction rate (inst/s)
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host_op_rate 2813942 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 1408584494 # Simulator tick rate (ticks/s)
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host_mem_usage 287952 # Number of bytes of host memory used
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host_seconds 31.39 # Real time elapsed on the host
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sim_insts 88340673 # Number of instructions simulated
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sim_ops 88340673 # Number of ops (including micro ops) simulated
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|
system.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.clk_domain.clock 1000 # Clock period in ticks
|
|
system.physmem.bytes_read::cpu.inst 353752292 # Number of bytes read from this memory
|
|
system.physmem.bytes_read::cpu.data 126702647 # Number of bytes read from this memory
|
|
system.physmem.bytes_read::total 480454939 # Number of bytes read from this memory
|
|
system.physmem.bytes_inst_read::cpu.inst 353752292 # Number of instructions bytes read from this memory
|
|
system.physmem.bytes_inst_read::total 353752292 # Number of instructions bytes read from this memory
|
|
system.physmem.bytes_written::cpu.data 91652896 # Number of bytes written to this memory
|
|
system.physmem.bytes_written::total 91652896 # Number of bytes written to this memory
|
|
system.physmem.num_reads::cpu.inst 88438073 # Number of read requests responded to by this memory
|
|
system.physmem.num_reads::cpu.data 20276638 # Number of read requests responded to by this memory
|
|
system.physmem.num_reads::total 108714711 # Number of read requests responded to by this memory
|
|
system.physmem.num_writes::cpu.data 14613377 # Number of write requests responded to by this memory
|
|
system.physmem.num_writes::total 14613377 # Number of write requests responded to by this memory
|
|
system.physmem.bw_read::cpu.inst 7999644241 # Total read bandwidth from this memory (bytes/s)
|
|
system.physmem.bw_read::cpu.data 2865214229 # Total read bandwidth from this memory (bytes/s)
|
|
system.physmem.bw_read::total 10864858470 # Total read bandwidth from this memory (bytes/s)
|
|
system.physmem.bw_inst_read::cpu.inst 7999644241 # Instruction read bandwidth from this memory (bytes/s)
|
|
system.physmem.bw_inst_read::total 7999644241 # Instruction read bandwidth from this memory (bytes/s)
|
|
system.physmem.bw_write::cpu.data 2072610067 # Write bandwidth from this memory (bytes/s)
|
|
system.physmem.bw_write::total 2072610067 # Write bandwidth from this memory (bytes/s)
|
|
system.physmem.bw_total::cpu.inst 7999644241 # Total bandwidth to/from this memory (bytes/s)
|
|
system.physmem.bw_total::cpu.data 4937824296 # Total bandwidth to/from this memory (bytes/s)
|
|
system.physmem.bw_total::total 12937468537 # Total bandwidth to/from this memory (bytes/s)
|
|
system.membus.trans_dist::ReadReq 108714711 # Transaction distribution
|
|
system.membus.trans_dist::ReadResp 108714711 # Transaction distribution
|
|
system.membus.trans_dist::WriteReq 14613377 # Transaction distribution
|
|
system.membus.trans_dist::WriteResp 14613377 # Transaction distribution
|
|
system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 176876146 # Packet count per connected master and slave (bytes)
|
|
system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 69780030 # Packet count per connected master and slave (bytes)
|
|
system.membus.pkt_count::total 246656176 # Packet count per connected master and slave (bytes)
|
|
system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 353752292 # Cumulative packet size per connected master and slave (bytes)
|
|
system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 218355543 # Cumulative packet size per connected master and slave (bytes)
|
|
system.membus.pkt_size::total 572107835 # Cumulative packet size per connected master and slave (bytes)
|
|
system.membus.snoops 0 # Total snoops (count)
|
|
system.membus.snoop_fanout::samples 123328088 # Request fanout histogram
|
|
system.membus.snoop_fanout::mean 0.717096 # Request fanout histogram
|
|
system.membus.snoop_fanout::stdev 0.450410 # Request fanout histogram
|
|
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
|
|
system.membus.snoop_fanout::0 34890015 28.29% 28.29% # Request fanout histogram
|
|
system.membus.snoop_fanout::1 88438073 71.71% 100.00% # Request fanout histogram
|
|
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
|
|
system.membus.snoop_fanout::min_value 0 # Request fanout histogram
|
|
system.membus.snoop_fanout::max_value 1 # Request fanout histogram
|
|
system.membus.snoop_fanout::total 123328088 # Request fanout histogram
|
|
system.cpu_clk_domain.clock 500 # Clock period in ticks
|
|
system.cpu.dtb.fetch_hits 0 # ITB hits
|
|
system.cpu.dtb.fetch_misses 0 # ITB misses
|
|
system.cpu.dtb.fetch_acv 0 # ITB acv
|
|
system.cpu.dtb.fetch_accesses 0 # ITB accesses
|
|
system.cpu.dtb.read_hits 20276638 # DTB read hits
|
|
system.cpu.dtb.read_misses 90148 # DTB read misses
|
|
system.cpu.dtb.read_acv 0 # DTB read access violations
|
|
system.cpu.dtb.read_accesses 20366786 # DTB read accesses
|
|
system.cpu.dtb.write_hits 14613377 # DTB write hits
|
|
system.cpu.dtb.write_misses 7252 # DTB write misses
|
|
system.cpu.dtb.write_acv 0 # DTB write access violations
|
|
system.cpu.dtb.write_accesses 14620629 # DTB write accesses
|
|
system.cpu.dtb.data_hits 34890015 # DTB hits
|
|
system.cpu.dtb.data_misses 97400 # DTB misses
|
|
system.cpu.dtb.data_acv 0 # DTB access violations
|
|
system.cpu.dtb.data_accesses 34987415 # DTB accesses
|
|
system.cpu.itb.fetch_hits 88438073 # ITB hits
|
|
system.cpu.itb.fetch_misses 3934 # ITB misses
|
|
system.cpu.itb.fetch_acv 0 # ITB acv
|
|
system.cpu.itb.fetch_accesses 88442007 # ITB accesses
|
|
system.cpu.itb.read_hits 0 # DTB read hits
|
|
system.cpu.itb.read_misses 0 # DTB read misses
|
|
system.cpu.itb.read_acv 0 # DTB read access violations
|
|
system.cpu.itb.read_accesses 0 # DTB read accesses
|
|
system.cpu.itb.write_hits 0 # DTB write hits
|
|
system.cpu.itb.write_misses 0 # DTB write misses
|
|
system.cpu.itb.write_acv 0 # DTB write access violations
|
|
system.cpu.itb.write_accesses 0 # DTB write accesses
|
|
system.cpu.itb.data_hits 0 # DTB hits
|
|
system.cpu.itb.data_misses 0 # DTB misses
|
|
system.cpu.itb.data_acv 0 # DTB access violations
|
|
system.cpu.itb.data_accesses 0 # DTB accesses
|
|
system.cpu.workload.num_syscalls 4583 # Number of system calls
|
|
system.cpu.numCycles 88442007 # number of cpu cycles simulated
|
|
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
|
|
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
|
|
system.cpu.committedInsts 88340673 # Number of instructions committed
|
|
system.cpu.committedOps 88340673 # Number of ops (including micro ops) committed
|
|
system.cpu.num_int_alu_accesses 78039444 # Number of integer alu accesses
|
|
system.cpu.num_fp_alu_accesses 267757 # Number of float alu accesses
|
|
system.cpu.num_func_calls 3321606 # number of times a function call or return occured
|
|
system.cpu.num_conditional_control_insts 8920848 # number of instructions that are conditional controls
|
|
system.cpu.num_int_insts 78039444 # number of integer instructions
|
|
system.cpu.num_fp_insts 267757 # number of float instructions
|
|
system.cpu.num_int_register_reads 105931758 # number of times the integer registers were read
|
|
system.cpu.num_int_register_writes 52319251 # number of times the integer registers were written
|
|
system.cpu.num_fp_register_reads 229023 # number of times the floating registers were read
|
|
system.cpu.num_fp_register_writes 227630 # number of times the floating registers were written
|
|
system.cpu.num_mem_refs 34987415 # number of memory refs
|
|
system.cpu.num_load_insts 20366786 # Number of load instructions
|
|
system.cpu.num_store_insts 14620629 # Number of store instructions
|
|
system.cpu.num_idle_cycles 0 # Number of idle cycles
|
|
system.cpu.num_busy_cycles 88442007 # Number of busy cycles
|
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
|
system.cpu.Branches 13754477 # Number of branches fetched
|
|
system.cpu.op_class::No_OpClass 8748916 9.89% 9.89% # Class of executed instruction
|
|
system.cpu.op_class::IntAlu 44394799 50.20% 60.09% # Class of executed instruction
|
|
system.cpu.op_class::IntMult 41101 0.05% 60.14% # Class of executed instruction
|
|
system.cpu.op_class::IntDiv 0 0.00% 60.14% # Class of executed instruction
|
|
system.cpu.op_class::FloatAdd 114304 0.13% 60.27% # Class of executed instruction
|
|
system.cpu.op_class::FloatCmp 84 0.00% 60.27% # Class of executed instruction
|
|
system.cpu.op_class::FloatCvt 113640 0.13% 60.40% # Class of executed instruction
|
|
system.cpu.op_class::FloatMult 50 0.00% 60.40% # Class of executed instruction
|
|
system.cpu.op_class::FloatDiv 37764 0.04% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::FloatSqrt 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdAdd 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdAddAcc 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdAlu 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdCmp 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdCvt 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdMisc 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdMult 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdMultAcc 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdShift 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdShiftAcc 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdSqrt 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatAdd 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatAlu 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatCmp 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatCvt 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatDiv 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatMisc 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatMult 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatMultAcc 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::SimdFloatSqrt 0 0.00% 60.44% # Class of executed instruction
|
|
system.cpu.op_class::MemRead 20366786 23.03% 83.47% # Class of executed instruction
|
|
system.cpu.op_class::MemWrite 14620629 16.53% 100.00% # Class of executed instruction
|
|
system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
|
|
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
|
|
system.cpu.op_class::total 88438073 # Class of executed instruction
|
|
|
|
---------- End Simulation Statistics ----------
|