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gem5/src/cpu/o3
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Nathan Binkert f0fb3ac060 cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep. 
Make interrupts use the new wakeup method, and pull all of the interrupt
stuff into the cpu base class so that only the wakeup code needs to be updated.
I tried to make wakeup, wakeCPU, and the various other mechanisms for waking
and sleeping a little more sane, but I couldn't understand why the statistics
were changing the way they were.  Maybe we'll try again some day.
2009-01-24 07:27:21 -08:00
..
2bit_local_pred.cc Merge ktlim@zamp:/z/ktlim2/clean/m5-o3 2006-06-04 16:07:54 -04:00
2bit_local_pred.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
base_dyn_inst.cc O3CPU: Make the instcount debugging stuff per-cpu. 2008-11-10 11:51:18 -08:00
bpred_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
bpred_unit.hh params: Convert the CPU objects to use the auto generated param structs. 2008-08-11 12:22:16 -07:00
bpred_unit_impl.hh params: Convert the CPU objects to use the auto generated param structs. 2008-08-11 12:22:16 -07:00
btb.cc Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
btb.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
checker_builder.cc CPU: Make the cpuid parameter get set in SE mode as well. 2007-10-02 18:33:57 -07:00
comm.hh Add support for microcode and pull out the special branch delay slot handling. Branch delay slots need to be squash on a mispredict as well because the nnpc they saw was incorrect. 2007-04-14 17:13:18 +00:00
commit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
commit.hh params: Convert the CPU objects to use the auto generated param structs. 2008-08-11 12:22:16 -07:00
commit_impl.hh eventq: use the flags data structure 2008-12-06 14:18:18 -08:00
cpu.cc cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep. 2009-01-24 07:27:21 -08:00
cpu.hh cpu: provide a wakeup mechanism that can be used to pull CPUs out of sleep. 2009-01-24 07:27:21 -08:00
cpu_builder.cc O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
cpu_policy.hh gcc: Version 4.3 is pretty anal about shadowing types, placate it. 2008-09-22 08:25:57 -07:00
decode.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
decode.hh params: Convert the CPU objects to use the auto generated param structs. 2008-08-11 12:22:16 -07:00
decode_impl.hh params: Convert the CPU objects to use the auto generated param structs. 2008-08-11 12:22:16 -07:00
dep_graph.hh Miscellaneous minor fixes. 2006-06-16 17:15:18 -04:00
dyn_inst.cc O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
dyn_inst.hh O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Removing hwrei causes 2008-10-20 16:22:59 -04:00
dyn_inst_impl.hh O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Removing hwrei causes 2008-10-20 16:22:59 -04:00
fetch.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
fetch.hh eventq: convert all usage of events to use the new API. 2008-10-09 04:58:24 -07:00
fetch_impl.hh Add in Context IDs to the simulator. From now on, cpuId is almost never used, 2008-11-02 21:57:07 -05:00
free_list.cc Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
free_list.hh Add comments in code to describe bug conditions. 2008-02-27 17:50:29 -05:00
fu_pool.cc params: Deprecate old-style constructors; update most SimObject constructors. 2007-08-30 15:16:59 -04:00
fu_pool.hh params: Deprecate old-style constructors; update most SimObject constructors. 2007-08-30 15:16:59 -04:00
FuncUnitConfig.py Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
FUPool.py Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
iew.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
iew.hh O3CPU: Fix thread writeback logic. 2008-09-26 07:44:07 -07:00
iew_impl.hh params: Convert the CPU objects to use the auto generated param structs. 2008-08-11 12:22:16 -07:00
impl.hh O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
inst_queue.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
inst_queue.hh params: Convert the CPU objects to use the auto generated param structs. 2008-08-11 12:22:16 -07:00
inst_queue_impl.hh eventq: convert all usage of events to use the new API. 2008-10-09 04:58:24 -07:00
isa_specific.hh O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
lsq.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
lsq.hh Add in Context IDs to the simulator. From now on, cpuId is almost never used, 2008-11-02 21:57:07 -05:00
lsq_impl.hh Add in Context IDs to the simulator. From now on, cpuId is almost never used, 2008-11-02 21:57:07 -05:00
lsq_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
lsq_unit.hh eventq: convert all usage of events to use the new API. 2008-10-09 04:58:24 -07:00
lsq_unit_impl.hh eventq: convert all usage of events to use the new API. 2008-10-09 04:58:24 -07:00
mem_dep_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
mem_dep_unit.hh params: Convert the CPU objects to use the auto generated param structs. 2008-08-11 12:22:16 -07:00
mem_dep_unit_impl.hh params: Convert the CPU objects to use the auto generated param structs. 2008-08-11 12:22:16 -07:00
O3Checker.py Changed BaseCPU::ProfileEvent's interval member to be of type Tick. This was done to be consistent with its 2008-08-18 10:50:58 -07:00
O3CPU.py params: Convert the CPU objects to use the auto generated param structs. 2008-08-11 12:22:16 -07:00
ras.cc Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
ras.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
regfile.hh style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
rename.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
rename.hh params: Convert the CPU objects to use the auto generated param structs. 2008-08-11 12:22:16 -07:00
rename_impl.hh params: Convert the CPU objects to use the auto generated param structs. 2008-08-11 12:22:16 -07:00
rename_map.cc Make the floating point zero register special handling only apply for ALPHA. 2007-04-22 17:50:43 +00:00
rename_map.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
rob.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
rob.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
rob_impl.hh Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions. 2007-04-04 15:38:59 -04:00
sat_counter.cc Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
sat_counter.hh Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
SConscript O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
SConsopts Rework the way SCons recurses into subdirectories, making it 2007-03-10 23:00:54 -08:00
scoreboard.cc Make the floating point zero register special handling only apply for ALPHA. 2007-04-22 17:50:43 +00:00
scoreboard.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
store_set.cc Fixes to get new CPU model working for simple test case. The CPU does not yet support retrying accesses. 2006-06-05 18:14:39 -04:00
store_set.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
thread_context.cc O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
thread_context.hh thread_context: move getSystemPtr so SE mode can get to it. 2009-01-19 20:36:49 -08:00
thread_context_impl.hh thread_context: move getSystemPtr so SE mode can get to it. 2009-01-19 20:36:49 -08:00
thread_state.hh make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered 2008-11-02 21:56:57 -05:00
tournament_pred.cc Merge ktlim@zamp:./local/clean/o3-merge/m5 2006-09-30 23:43:23 -04:00
tournament_pred.hh Merge ktlim@zamp:./local/clean/o3-merge/m5 2006-09-30 23:43:23 -04:00