95 lines
3.3 KiB
C++
95 lines
3.3 KiB
C++
/*
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* Copyright (c) 2007 MIPS Technologies, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Korey Sewell
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*
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*/
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#ifndef __CPU_INORDER_FIRST_STAGE_HH__
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#define __CPU_INORDER_FIRST_STAGE_HH__
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#include <queue>
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#include <vector>
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#include "base/statistics.hh"
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#include "cpu/inorder/comm.hh"
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#include "cpu/inorder/inorder_dyn_inst.hh"
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#include "cpu/inorder/params.hh"
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#include "cpu/inorder/pipeline_stage.hh"
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#include "cpu/inorder/pipeline_traits.hh"
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#include "cpu/timebuf.hh"
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class InOrderCPU;
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class FirstStage : public PipelineStage {
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public:
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FirstStage(ThePipeline::Params *params, unsigned stage_num);
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/** Set Pointer to CPU */
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void setCPU(InOrderCPU *cpu_ptr);
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/** Evaluate Stage Info. & Execute Stage */
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void processStage(bool &status_change);
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/** Process All Instructions Available */
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void processInsts(ThreadID tid);
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/** Squash Instructions Above a Seq. Num */
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void squash(InstSeqNum squash_seq_num, ThreadID tid);
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void squashDueToMemStall(InstSeqNum seq_num, ThreadID tid);
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/** There are no insts. coming from previous stages, so there is
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* no need to sort insts here
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*/
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void sortInsts() {}
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/** The number of fetching threads in the CPU */
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int numFetchingThreads;
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//@TODO: Add fetch priority information to a resource class...
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/** Fetching Policy, Add new policies here.*/
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enum FetchPriority {
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SingleThread,
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RoundRobin
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};
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/** Fetch policy. */
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FetchPriority fetchPolicy;
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/** List that has the threads organized by priority. */
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std::list<ThreadID> *fetchPriorityList;
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/** Return the next fetching thread */
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ThreadID getFetchingThread(FetchPriority &fetch_priority);
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/** Return next thread given Round Robin Policy for Thread Fetching */
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ThreadID roundRobin();
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};
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#endif // __CPU_INORDER_FIRST_STAGE_HH__
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