sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity
7047 commits 2 branches 0 tags 204 MiB
C++ 67.4%
Python 18.6%
C 11.5%
Assembly 1%
HTML 0.6%
Other 0.8%
Go to file
Steve Reinhardt f066bfc2f5 cpu: get rid of uncached access "events" 
These recordEvent() calls could cause crashes since they
access the req pointer after it's potentially been
deleted during a failed translation call.  (Similar
problem to the traceData bug fixed in the previous cset.)

Moving them above the translation call (as was done
recentlyi in cset 8b2b8e5e7d35) avoids the crash
but doesn't work, since at that point we don't know if
the access is uncached or not.

It's not clear why these calls are there, and no one
seems to use them, so we'll just delete them.  If they
are needed, they should be moved to somewhere that's
guaranteed to be after the translation completes but
before the request is possibly deleted, e.g., in
finishTranslation().
2010-03-23 08:50:59 -07:00
build_opts m5: Added PROTOCOL default for regress fix 2010-01-31 22:21:01 -08:00
configs ruby: Reorganized Ruby topology and protocol files 2010-03-21 21:22:22 -07:00
ext ply: update PLY to version 3.2 2009-08-16 13:39:58 -07:00
src cpu: get rid of uncached access "events" 2010-03-23 08:50:59 -07:00
tests inorder: update hello world for alpha and mips 2010-03-23 00:26:53 -04:00
util m5: Regression Tester Update 2010-01-29 20:29:40 -08:00
.hgignore m5: Added the default m5out directory to the hg ignore list 2009-11-18 16:34:32 -08:00
.hgtags Added tag Calvin_Submission for changeset 5de565c4b7bd 2009-11-18 11:55:42 -06:00
AUTHORS RELEASE: More changes to text 2007-11-01 21:07:49 -04:00
LICENSE Update copyright dates 2008-02-11 12:35:28 -05:00
README Update the README and RELEASE_NOTES files to prepare for beta 6. 2008-10-07 00:53:25 -04:00
RELEASE_NOTES Update the README and RELEASE_NOTES files to prepare for beta 6. 2008-10-07 00:53:25 -04:00
SConstruct cpu_models: get rid of cpu_models.py and move the stuff into SCons 2010-02-26 18:14:48 -08:00

README 

This is release 2.0_beta6 of the M5 simulator.

For detailed information about building the simulator and getting
started please refer to http://www.m5sim.org.

Specific pages of interest are:
http://www.m5sim.org/wiki/index.php/Compiling_M5
http://www.m5sim.org/wiki/index.php/Running_M5

Short version:

1. If you don't have SCons version 0.96.91 or newer, get it from
http://wwww.scons.org.

2. If you don't have SWIG version 1.3.28 or newer, get it from
http://wwww.swig.org.

3. In this directory, type 'scons build/ALPHA_SE/tests/debug/quick'.  This
will build the debug version of the m5 binary (m5.debug) for the Alpha
syscall emulation target, and run the quick regression tests on it.

If you have questions, please send mail to m5-users@m5sim.org

WHAT'S INCLUDED (AND NOT)
-------------------------

The basic source release includes these subdirectories:
 - m5: 
   - src: source code of the m5 simulator
   - tests: regression tests
   - ext: less-common external packages needed to build m5

To run full-system simulations, you will need compiled console,
PALcode, and kernel binaries and one or more disk images.  These files
are collected in a separate archive, m5_system.tar.bz2.  This file
can he downloaded separately.

M5 supports Linux 2.4/2.6, FreeBSD, and the proprietary Compaq/HP
Tru64 version of Unix. We are able to distribute Linux and FreeBSD
bootdisks, but we are unable to distribute bootable disk images of
Tru64 Unix. If you have a Tru64 license and are interested in
obtaining disk images, contact us at m5-users@m5sim.org