gem5/arch
Kevin Lim f045b110cf Have a copyRegs function defined in the ISA that copies registers from one ExecContext to another ExecContext. This makes it easier for anything that needs to copy architected registers to do so in an ISA independent fashion.
arch/alpha/ev5.cc:
    copyIprs now copies from a source ExecContext to a destination ExecContext.
arch/alpha/registerfile.hh:
    Have ISA specific functions to copy all architected registers from one ExecContext to another.
cpu/cpu_exec_context.cc:
    Call the ISA in order to copy any architected registers.

--HG--
extra : convert_revision : 056cc3b3a9f345535d5a57c6524b114bbd5ae3c8
2006-03-13 17:04:24 -05:00
..
alpha Have a copyRegs function defined in the ISA that copies registers from one ExecContext to another ExecContext. This makes it easier for anything that needs to copy architected registers to do so in an ISA independent fashion. 2006-03-13 17:04:24 -05:00
mips Clean up arch/*/process.hh includes and std namespace issues. 2006-03-12 16:27:52 -05:00
sparc Clean up arch/*/process.hh includes and std namespace issues. 2006-03-12 16:27:52 -05:00
isa_parser.py Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included. 2006-03-03 15:28:25 -05:00
isa_specific.hh Auto-generate arch/foo.hh "switch headers" in scons. 2006-02-22 22:22:06 -05:00
SConscript Work towards factoring isa_traits.hh into smaller, more specialized files. 2006-03-10 19:11:27 -05:00