bb921b1459
So a mips-cross-gdb can connect with gem5(MIPS_SE), and do some remote debugging. Testing: Build gem5 for MIPS_SE and make gem5 wait at beginning: modify "rgdb_wait = -1" to "rgdb_wait = 0" in src/sim/system.cc; scons build/MIPS_SE/gem5.opt CPU_MODELS=O3CPU ---- Build GDB-7.3 mips-cross: ./configure --target=mips-linux-gnu --prefix=xxx/gdb-7.3-install/ make make install ---- Run: ./build/MIPS_SE/gem5.opt configs/example/se.py --detailed --caches ./mips-linux-gnu-gdb xxx/gem5/tests/test-progs/hello/bin/mips/linux/hello (gdb) target remote :7000 (gdb) info registers (gdb) disassemble (gdb) si (gdb) break main (gdb) c (gdb) quit Testing done.
93 lines
3 KiB
C++
93 lines
3 KiB
C++
/*
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* Copyright (c) 2007 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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*/
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#ifndef __ARCH_MIPS_REMOTE_GDB_HH__
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#define __ARCH_MIPS_REMOTE_GDB_HH__
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#include "arch/mips/registers.hh"
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#include "base/bitfield.hh"
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#include "base/remote_gdb.hh"
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class System;
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class ThreadContext;
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class PhysicalMemory;
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namespace MipsISA
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{
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// The number of special regs depends on gdb.
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// Two 32-bit regs are packed into one 64-bit reg.
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const int GdbIntArchRegs = NumIntArchRegs / 2;
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const int GdbIntSpecialRegs = 6 / 2;
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const int GdbFloatArchRegs = NumFloatArchRegs / 2;
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const int GdbFloatSpecialRegs = 2 / 2;
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const int GdbIntRegs = GdbIntArchRegs + GdbIntSpecialRegs;
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const int GdbFloatRegs = GdbFloatArchRegs + GdbFloatSpecialRegs;
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const int GdbNumRegs = GdbIntRegs + GdbFloatRegs;
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class RemoteGDB : public BaseRemoteGDB
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{
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protected:
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Addr notTakenBkpt;
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Addr takenBkpt;
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public:
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RemoteGDB(System *_system, ThreadContext *tc);
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protected:
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bool acc(Addr addr, size_t len);
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void getregs();
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void setregs();
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void clearSingleStep();
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void setSingleStep();
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private:
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uint64_t
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pack(uint32_t lo, uint32_t hi)
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{
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return static_cast<uint64_t>(hi) << 32 | lo;
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}
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uint32_t
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unpackLo(uint64_t val)
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{
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return bits(val, 31, 0);
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}
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uint32_t
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unpackHi(uint64_t val)
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{
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return bits(val, 63, 32);
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}
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};
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}
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#endif /* __ARCH_MIPS_REMOTE_GDB_H__ */
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