558cc7f775
arch/alpha/types.hh:
Moved the DependenceTags enum from types to constants.
arch/sparc/faults.cc:
arch/sparc/faults.hh:
Corrected a misspelling of PriviledgeOpcode and PrivilegedAction.
arch/sparc/isa/formats.isa:
Fixups towards compiling. Added a few additional instruction formats.
--HG--
extra : convert_revision : 4c5506877b71b8a5c8c45db41192cf759cdac374
65 lines
2.2 KiB
C++
65 lines
2.2 KiB
C++
/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_ALPHA_TYPES_HH__
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#define __ARCH_ALPHA_TYPES_HH__
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#include "sim/host.hh"
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namespace AlphaISA
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{
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typedef uint32_t MachInst;
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typedef uint64_t ExtMachInst;
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typedef uint8_t RegIndex;
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typedef uint64_t IntReg;
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// floating point register file entry type
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typedef double FloatReg;
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typedef uint64_t FloatRegBits;
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// control register file contents
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typedef uint64_t MiscReg;
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typedef union {
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IntReg intreg;
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FloatReg fpreg;
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MiscReg ctrlreg;
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} AnyReg;
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enum annotes {
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ANNOTE_NONE = 0,
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// An impossible number for instruction annotations
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ITOUCH_ANNOTE = 0xffffffff,
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};
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} // namespace AlphaISA
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#endif
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