gem5/arch/alpha/linux
Ali Saidi 97e424982a add translations for new sections that are mmapped or when the brk
is changed
Add a default machine width parameter
Arch based live processes

arch/alpha/linux/process.cc:
arch/alpha/linux/process.hh:
arch/alpha/process.cc:
arch/alpha/process.hh:
arch/alpha/tru64/process.cc:
arch/alpha/tru64/process.hh:
arch/mips/linux_process.cc:
arch/mips/process.cc:
arch/mips/process.hh:
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
arch/sparc/process.cc:
arch/sparc/process.hh:
configs/test/test.py:
python/m5/objects/Process.py:
sim/process.cc:
sim/process.hh:
    Architecture based live processes
arch/mips/isa_traits.hh:
arch/sparc/isa_traits.hh:
    Add a default machine width parameter
mem/port.hh:
    gcc 4 really wants  a virtual destructor
sim/byteswap.hh:
    remove the comment around long and unsigned long even though uint32_t
    and int32_t are defined. Seems to work with gcc 4 and 3.4.3.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    add translations for new sections that are mmapped or when the brk
    is changed

--HG--
extra : convert_revision : e2f9f228113c7127c87ef2358209a399c30ed5c6
2006-03-15 17:04:50 -05:00
..
aligned.hh move alpha specific code into arch/alpha 2006-03-04 20:45:01 -05:00
hwrpb.hh move alpha specific code into arch/alpha 2006-03-04 20:45:01 -05:00
process.cc add translations for new sections that are mmapped or when the brk 2006-03-15 17:04:50 -05:00
process.hh add translations for new sections that are mmapped or when the brk 2006-03-15 17:04:50 -05:00
system.cc Merge ktlim@zizzer:/bk/m5 2006-03-05 00:34:54 -05:00
system.hh move alpha specific code into arch/alpha 2006-03-04 20:45:01 -05:00
thread_info.hh move alpha specific code into arch/alpha 2006-03-04 20:45:01 -05:00
threadinfo.hh Merge ktlim@zizzer:/bk/m5 2006-03-05 00:34:54 -05:00