100 lines
3.4 KiB
C++
100 lines
3.4 KiB
C++
/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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* Ali Saidi
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*/
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#include "arch/alpha/ev5.hh"
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#include "arch/alpha/utility.hh"
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#if FULL_SYSTEM
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#include "arch/alpha/vtophys.hh"
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#include "mem/vport.hh"
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#endif
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namespace AlphaISA {
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uint64_t
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getArgument(ThreadContext *tc, int number, bool fp)
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{
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#if FULL_SYSTEM
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const int NumArgumentRegs = 6;
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if (number < NumArgumentRegs) {
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if (fp)
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return tc->readFloatRegBits(16 + number);
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else
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return tc->readIntReg(16 + number);
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} else {
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Addr sp = tc->readIntReg(StackPointerReg);
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VirtualPort *vp = tc->getVirtPort();
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uint64_t arg = vp->read<uint64_t>(sp +
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(number-NumArgumentRegs) * sizeof(uint64_t));
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return arg;
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}
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#else
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panic("getArgument() is Full system only\n");
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M5_DUMMY_RETURN;
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#endif
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}
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void
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copyRegs(ThreadContext *src, ThreadContext *dest)
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{
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// First loop through the integer registers.
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for (int i = 0; i < NumIntRegs; ++i)
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dest->setIntReg(i, src->readIntReg(i));
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// Then loop through the floating point registers.
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for (int i = 0; i < NumFloatRegs; ++i)
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dest->setFloatRegBits(i, src->readFloatRegBits(i));
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// Copy misc. registers
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copyMiscRegs(src, dest);
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// Lastly copy PC/NPC
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dest->setPC(src->readPC());
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dest->setNextPC(src->readNextPC());
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}
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void
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copyMiscRegs(ThreadContext *src, ThreadContext *dest)
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{
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dest->setMiscRegNoEffect(MISCREG_FPCR,
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src->readMiscRegNoEffect(MISCREG_FPCR));
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dest->setMiscRegNoEffect(MISCREG_UNIQ,
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src->readMiscRegNoEffect(MISCREG_UNIQ));
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dest->setMiscRegNoEffect(MISCREG_LOCKFLAG,
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src->readMiscRegNoEffect(MISCREG_LOCKFLAG));
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dest->setMiscRegNoEffect(MISCREG_LOCKADDR,
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src->readMiscRegNoEffect(MISCREG_LOCKADDR));
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copyIprs(src, dest);
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}
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} // namespace AlphaISA
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