Further renames/reorganization will be coming shortly; what is currently CPUExecContext (the old ExecContext from m5) will be renamed to SimpleThread or something similar. src/arch/alpha/arguments.cc: src/arch/alpha/arguments.hh: src/arch/alpha/ev5.cc: src/arch/alpha/faults.cc: src/arch/alpha/faults.hh: src/arch/alpha/freebsd/system.cc: src/arch/alpha/freebsd/system.hh: src/arch/alpha/isa/branch.isa: src/arch/alpha/isa/decoder.isa: src/arch/alpha/isa/main.isa: src/arch/alpha/linux/process.cc: src/arch/alpha/linux/system.cc: src/arch/alpha/linux/system.hh: src/arch/alpha/linux/threadinfo.hh: src/arch/alpha/process.cc: src/arch/alpha/regfile.hh: src/arch/alpha/stacktrace.cc: src/arch/alpha/stacktrace.hh: src/arch/alpha/tlb.cc: src/arch/alpha/tlb.hh: src/arch/alpha/tru64/process.cc: src/arch/alpha/tru64/system.cc: src/arch/alpha/tru64/system.hh: src/arch/alpha/utility.hh: src/arch/alpha/vtophys.cc: src/arch/alpha/vtophys.hh: src/arch/mips/faults.cc: src/arch/mips/faults.hh: src/arch/mips/isa_traits.cc: src/arch/mips/isa_traits.hh: src/arch/mips/linux/process.cc: src/arch/mips/process.cc: src/arch/mips/regfile/float_regfile.hh: src/arch/mips/regfile/int_regfile.hh: src/arch/mips/regfile/misc_regfile.hh: src/arch/mips/regfile/regfile.hh: src/arch/mips/stacktrace.hh: src/arch/sparc/faults.cc: src/arch/sparc/faults.hh: src/arch/sparc/isa_traits.hh: src/arch/sparc/linux/process.cc: src/arch/sparc/linux/process.hh: src/arch/sparc/process.cc: src/arch/sparc/regfile.hh: src/arch/sparc/solaris/process.cc: src/arch/sparc/stacktrace.hh: src/arch/sparc/ua2005.cc: src/arch/sparc/utility.hh: src/arch/sparc/vtophys.cc: src/arch/sparc/vtophys.hh: src/base/remote_gdb.cc: src/base/remote_gdb.hh: src/cpu/base.cc: src/cpu/base.hh: src/cpu/base_dyn_inst.hh: src/cpu/checker/cpu.cc: src/cpu/checker/cpu.hh: src/cpu/checker/exec_context.hh: src/cpu/cpu_exec_context.cc: src/cpu/cpu_exec_context.hh: src/cpu/cpuevent.cc: src/cpu/cpuevent.hh: src/cpu/exetrace.hh: src/cpu/intr_control.cc: src/cpu/memtest/memtest.hh: src/cpu/o3/alpha_cpu.hh: src/cpu/o3/alpha_cpu_impl.hh: src/cpu/o3/alpha_dyn_inst_impl.hh: src/cpu/o3/commit.hh: src/cpu/o3/commit_impl.hh: src/cpu/o3/cpu.cc: src/cpu/o3/cpu.hh: src/cpu/o3/fetch_impl.hh: src/cpu/o3/regfile.hh: src/cpu/o3/thread_state.hh: src/cpu/ozone/back_end.hh: src/cpu/ozone/cpu.hh: src/cpu/ozone/cpu_impl.hh: src/cpu/ozone/front_end.hh: src/cpu/ozone/front_end_impl.hh: src/cpu/ozone/inorder_back_end.hh: src/cpu/ozone/lw_back_end.hh: src/cpu/ozone/lw_back_end_impl.hh: src/cpu/ozone/lw_lsq.hh: src/cpu/ozone/lw_lsq_impl.hh: src/cpu/ozone/thread_state.hh: src/cpu/pc_event.cc: src/cpu/pc_event.hh: src/cpu/profile.cc: src/cpu/profile.hh: src/cpu/quiesce_event.cc: src/cpu/quiesce_event.hh: src/cpu/simple/atomic.cc: src/cpu/simple/base.cc: src/cpu/simple/base.hh: src/cpu/simple/timing.cc: src/cpu/static_inst.cc: src/cpu/static_inst.hh: src/cpu/thread_state.hh: src/dev/alpha_console.cc: src/dev/ns_gige.cc: src/dev/sinic.cc: src/dev/tsunami_cchip.cc: src/kern/kernel_stats.cc: src/kern/kernel_stats.hh: src/kern/linux/events.cc: src/kern/linux/events.hh: src/kern/system_events.cc: src/kern/system_events.hh: src/kern/tru64/dump_mbuf.cc: src/kern/tru64/tru64.hh: src/kern/tru64/tru64_events.cc: src/kern/tru64/tru64_events.hh: src/mem/vport.cc: src/mem/vport.hh: src/sim/faults.cc: src/sim/faults.hh: src/sim/process.cc: src/sim/process.hh: src/sim/pseudo_inst.cc: src/sim/pseudo_inst.hh: src/sim/syscall_emul.cc: src/sim/syscall_emul.hh: src/sim/system.cc: src/cpu/thread_context.hh: src/sim/system.hh: src/sim/vptr.hh: Change ExecContext to ThreadContext. --HG-- rename : src/cpu/exec_context.hh => src/cpu/thread_context.hh extra : convert_revision : 108bb97d15a114a565a2a6a23faa554f4e2fd77e
171 lines
5.8 KiB
C++
171 lines
5.8 KiB
C++
/*
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* Copyright (c) 2003-2004 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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* Ali Saidi
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*/
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#include "arch/alpha/constants.hh"
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#include "arch/alpha/process.hh"
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#include "arch/alpha/linux/process.hh"
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#include "arch/alpha/tru64/process.hh"
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#include "base/loader/object_file.hh"
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#include "base/misc.hh"
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#include "cpu/thread_context.hh"
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#include "sim/builder.hh"
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#include "sim/system.hh"
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using namespace AlphaISA;
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using namespace std;
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AlphaLiveProcess *
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AlphaLiveProcess::create(const std::string &nm, System *system, int stdin_fd,
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int stdout_fd, int stderr_fd, std::string executable,
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std::vector<std::string> &argv, std::vector<std::string> &envp)
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{
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AlphaLiveProcess *process = NULL;
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ObjectFile *objFile = createObjectFile(executable);
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if (objFile == NULL) {
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fatal("Can't load object file %s", executable);
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}
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if (objFile->getArch() != ObjectFile::Alpha)
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fatal("Object file does not match architecture.");
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switch (objFile->getOpSys()) {
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case ObjectFile::Tru64:
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process = new AlphaTru64Process(nm, objFile, system,
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stdin_fd, stdout_fd, stderr_fd,
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argv, envp);
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break;
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case ObjectFile::Linux:
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process = new AlphaLinuxProcess(nm, objFile, system,
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stdin_fd, stdout_fd, stderr_fd,
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argv, envp);
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break;
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default:
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fatal("Unknown/unsupported operating system.");
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}
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if (process == NULL)
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fatal("Unknown error creating process object.");
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return process;
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}
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AlphaLiveProcess::AlphaLiveProcess(const std::string &nm, ObjectFile *objFile,
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System *_system, int stdin_fd, int stdout_fd, int stderr_fd,
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std::vector<std::string> &argv, std::vector<std::string> &envp)
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: LiveProcess(nm, objFile, _system, stdin_fd, stdout_fd, stderr_fd,
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argv, envp)
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{
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brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
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brk_point = roundUp(brk_point, VMPageSize);
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// Set up stack. On Alpha, stack goes below text section. This
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// code should get moved to some architecture-specific spot.
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stack_base = objFile->textBase() - (409600+4096);
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// Set up region for mmaps. Tru64 seems to start just above 0 and
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// grow up from there.
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mmap_start = mmap_end = 0x10000;
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// Set pointer for next thread stack. Reserve 8M for main stack.
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next_thread_stack_base = stack_base - (8 * 1024 * 1024);
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}
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void
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AlphaLiveProcess::startup()
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{
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argsInit(MachineBytes, VMPageSize);
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threadContexts[0]->setIntReg(GlobalPointerReg, objFile->globalPointer());
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}
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BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaLiveProcess)
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VectorParam<string> cmd;
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Param<string> executable;
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Param<string> input;
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Param<string> output;
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VectorParam<string> env;
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SimObjectParam<System *> system;
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END_DECLARE_SIM_OBJECT_PARAMS(AlphaLiveProcess)
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BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaLiveProcess)
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INIT_PARAM(cmd, "command line (executable plus arguments)"),
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INIT_PARAM(executable, "executable (overrides cmd[0] if set)"),
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INIT_PARAM(input, "filename for stdin (dflt: use sim stdin)"),
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INIT_PARAM(output, "filename for stdout/stderr (dflt: use sim stdout)"),
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INIT_PARAM(env, "environment settings"),
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INIT_PARAM(system, "system")
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END_INIT_SIM_OBJECT_PARAMS(AlphaLiveProcess)
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CREATE_SIM_OBJECT(AlphaLiveProcess)
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{
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string in = input;
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string out = output;
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// initialize file descriptors to default: same as simulator
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int stdin_fd, stdout_fd, stderr_fd;
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if (in == "stdin" || in == "cin")
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stdin_fd = STDIN_FILENO;
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else
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stdin_fd = Process::openInputFile(input);
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if (out == "stdout" || out == "cout")
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stdout_fd = STDOUT_FILENO;
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else if (out == "stderr" || out == "cerr")
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stdout_fd = STDERR_FILENO;
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else
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stdout_fd = Process::openOutputFile(out);
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stderr_fd = (stdout_fd != STDOUT_FILENO) ? stdout_fd : STDERR_FILENO;
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return AlphaLiveProcess::create(getInstanceName(), system,
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stdin_fd, stdout_fd, stderr_fd,
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(string)executable == "" ? cmd[0] : executable,
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cmd, env);
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}
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REGISTER_SIM_OBJECT("AlphaLiveProcess", AlphaLiveProcess)
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