5146a69835
isSyscall was originally created because during handling of a syscall in SE mode the threadcontext had to be updated. However, in many places this is used in FS mode (e.g. fault handlers) and the name doesn't make much sense. The boolean actually stops gem5 from squashing speculative and non-committed state when a write to a threadcontext happens, so re-name the variable to something more appropriate
273 lines
6.6 KiB
C++
273 lines
6.6 KiB
C++
/*
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* Copyright (c) 2005-2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Kevin Lim
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*/
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#include "config/the_isa.hh"
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#include "cpu/ozone/dyn_inst.hh"
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#include "kern/kernel_stats.hh"
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#include "sim/faults.hh"
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template <class Impl>
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OzoneDynInst<Impl>::OzoneDynInst(OzoneCPU *cpu)
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: BaseDynInst<Impl>(0, 0, 0, 0, cpu)
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{
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this->setResultReady();
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initInstPtrs();
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}
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template <class Impl>
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OzoneDynInst<Impl>::OzoneDynInst(StaticInstPtr _staticInst)
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: BaseDynInst<Impl>(_staticInst)
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{
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initInstPtrs();
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}
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template <class Impl>
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OzoneDynInst<Impl>::~OzoneDynInst()
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{
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DPRINTF(BE, "[sn:%lli] destructor called\n", this->seqNum);
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for (int i = 0; i < this->numSrcRegs(); ++i) {
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srcInsts[i] = NULL;
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}
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for (int i = 0; i < this->numDestRegs(); ++i) {
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prevDestInst[i] = NULL;
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}
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dependents.clear();
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}
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template <class Impl>
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Fault
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OzoneDynInst<Impl>::execute()
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{
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// @todo: Pretty convoluted way to avoid squashing from happening when using
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// the XC during an instruction's execution (specifically for instructions
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// that have sideeffects that use the XC). Fix this.
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bool no_squash_from_TC = this->thread->noSquashFromTC;
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this->thread->noSquashFromTC = true;
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this->fault = this->staticInst->execute(this, this->traceData);
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this->thread->noSquashFromTC = no_squash_from_TC;
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return this->fault;
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}
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template <class Impl>
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Fault
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OzoneDynInst<Impl>::initiateAcc()
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{
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// @todo: Pretty convoluted way to avoid squashing from happening when using
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// the XC during an instruction's execution (specifically for instructions
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// that have sideeffects that use the XC). Fix this.
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bool no_squash_from_TC = this->thread->noSquashFromTC;
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this->thread->noSquashFromTC = true;
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this->fault = this->staticInst->initiateAcc(this, this->traceData);
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this->thread->noSquashFromTC = no_squash_from_TC;
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return this->fault;
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}
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template <class Impl>
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Fault
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OzoneDynInst<Impl>::completeAcc(PacketPtr pkt)
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{
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this->fault = this->staticInst->completeAcc(pkt, this, this->traceData);
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return this->fault;
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}
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template <class Impl>
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bool
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OzoneDynInst<Impl>::srcInstReady(int regIdx)
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{
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return srcInsts[regIdx]->isResultReady();
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}
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template <class Impl>
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void
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OzoneDynInst<Impl>::addDependent(DynInstPtr &dependent_inst)
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{
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dependents.push_back(dependent_inst);
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}
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template <class Impl>
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void
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OzoneDynInst<Impl>::wakeDependents()
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{
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for (int i = 0; i < dependents.size(); ++i) {
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dependents[i]->markSrcRegReady();
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}
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}
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template <class Impl>
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void
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OzoneDynInst<Impl>::wakeMemDependents()
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{
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for (int i = 0; i < memDependents.size(); ++i) {
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memDependents[i]->markMemInstReady(this);
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}
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}
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template <class Impl>
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void
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OzoneDynInst<Impl>::markMemInstReady(OzoneDynInst<Impl> *inst)
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{
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ListIt mem_it = srcMemInsts.begin();
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while ((*mem_it) != inst && mem_it != srcMemInsts.end()) {
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mem_it++;
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}
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assert(mem_it != srcMemInsts.end());
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srcMemInsts.erase(mem_it);
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}
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template <class Impl>
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void
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OzoneDynInst<Impl>::initInstPtrs()
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{
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for (int i = 0; i < MaxInstSrcRegs; ++i) {
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srcInsts[i] = NULL;
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}
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iqItValid = false;
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}
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template <class Impl>
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bool
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OzoneDynInst<Impl>::srcsReady()
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{
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for (int i = 0; i < this->numSrcRegs(); ++i) {
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if (!srcInsts[i]->isResultReady())
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return false;
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}
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return true;
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}
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template <class Impl>
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bool
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OzoneDynInst<Impl>::eaSrcsReady()
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{
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for (int i = 1; i < this->numSrcRegs(); ++i) {
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if (!srcInsts[i]->isResultReady())
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return false;
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}
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return true;
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}
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template <class Impl>
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void
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OzoneDynInst<Impl>::clearDependents()
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{
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dependents.clear();
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for (int i = 0; i < this->numSrcRegs(); ++i) {
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srcInsts[i] = NULL;
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}
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for (int i = 0; i < this->numDestRegs(); ++i) {
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prevDestInst[i] = NULL;
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}
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}
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template <class Impl>
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void
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OzoneDynInst<Impl>::clearMemDependents()
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{
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memDependents.clear();
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}
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template <class Impl>
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TheISA::MiscReg
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OzoneDynInst<Impl>::readMiscRegNoEffect(int misc_reg)
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{
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return this->thread->readMiscRegNoEffect(misc_reg);
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}
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template <class Impl>
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TheISA::MiscReg
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OzoneDynInst<Impl>::readMiscReg(int misc_reg)
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{
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return this->thread->readMiscReg(misc_reg);
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}
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template <class Impl>
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void
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OzoneDynInst<Impl>::setMiscRegNoEffect(int misc_reg, const MiscReg &val)
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{
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this->setIntResult(val);
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this->thread->setMiscRegNoEffect(misc_reg, val);
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}
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template <class Impl>
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void
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OzoneDynInst<Impl>::setMiscReg(int misc_reg, const MiscReg &val)
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{
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this->thread->setMiscReg(misc_reg, val);
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}
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template <class Impl>
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Fault
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OzoneDynInst<Impl>::hwrei()
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{
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if (!(this->readPC() & 0x3))
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return new AlphaISA::UnimplementedOpcodeFault;
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this->setNextPC(this->thread->readMiscRegNoEffect(AlphaISA::IPR_EXC_ADDR));
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this->cpu->hwrei();
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// FIXME: XXX check for interrupts? XXX
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return NoFault;
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}
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template <class Impl>
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void
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OzoneDynInst<Impl>::trap(Fault fault)
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{
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fault->invoke(this->thread->getTC());
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}
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template <class Impl>
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bool
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OzoneDynInst<Impl>::simPalCheck(int palFunc)
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{
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return this->cpu->simPalCheck(palFunc);
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}
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template <class Impl>
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void
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OzoneDynInst<Impl>::syscall(uint64_t &callnum)
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{
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this->cpu->syscall(callnum);
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}
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