Ron Dreslinski d96de69abc Add in a new translating port that allows syscalls to translate addresses via the page table before accessing the memory port. ... Other compile issues cleaned up. SConscript: Changes to compile the new Translating Port. Split out memtester and eio support, will rework them back in after first getting a simpleCPU to work arch/alpha/alpha_linux_process.cc: arch/alpha/alpha_tru64_process.cc: sim/syscall_emul.cc: sim/syscall_emul.hh: Changes to use the new translating Port. cpu/exec_context.cc: cpu/exec_context.hh: Create a translating port in each execution context. sim/process.cc: Fix the way we do proxy memory --HG-- extra : convert_revision : 3d33218fe8b425a5d9ce24757f1112b4aa6001fd		2006-02-20 23:26:39 -05:00
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alpha	Add in a new translating port that allows syscalls to translate addresses via the page table before accessing the memory port.	2006-02-20 23:26:39 -05:00
isa_parser.py	Hacks to avoid compiling in old FullCPU model.	2006-01-29 17:35:53 -05:00