gem5/tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout
Ali Saidi b634e81496 Regression: Update insttest regressions for new cache.
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extra : convert_revision : 100478b2ae00d9d3464c41d940276843a226422f
2007-08-14 00:16:08 -04:00

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Begining test of difficult SPARC instructions...
LDSTUB: Passed
SWAP: Passed
CAS FAIL: Passed
CAS WORK: Passed
CASX FAIL: Passed
CASX WORK: Passed
LDTX: Passed
LDTW: Passed
STTW: Passed
Done
M5 Simulator System
Copyright (c) 2001-2006
The Regents of The University of Michigan
All Rights Reserved
M5 compiled Aug 14 2007 00:08:15
M5 started Tue Aug 14 00:08:29 2007
M5 executing on zeep
command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-timing tests/run.py quick/02.insttest/sparc/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
Exiting @ tick 24345000 because target called exit()