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Kevin Lim e7825aab59 Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included. 
The shadow registers are folded into the normal integer registers to ease renaming indexing.

Include the removed Opcdec class of instructions for faulting when a pal mode only instruction is decoded in non-pal mode.

arch/alpha/ev5.cc:
    Changes to automatically map the shadow registers if the instruction is in PAL mode.
arch/alpha/isa/branch.isa:
arch/alpha/isa/decoder.isa:
arch/alpha/isa/fp.isa:
arch/alpha/isa/int.isa:
arch/alpha/isa/mem.isa:
arch/alpha/isa/pal.isa:
arch/alpha/isa/unimp.isa:
    Changes for automatically using the shadow registers.  Now instructions must decode based on an ExtMachInst, which is a MachInst with any decode context information concatenated onto the higher order bits.
arch/alpha/isa/main.isa:
    Changes for automatically using the shadow registers.  Now instructions must decode based on an ExtMachInst, which is a MachInst with any decode context information concatenated onto the higher order bits.

    The decoder (for Alpha) uses the 32nd bit in order to determine if the machine is in PAL mode.  If it is, then it refers to the reg_redir table to determine the true index of the register it is using.

    Also include the opcdec instruction definition.
arch/alpha/isa_traits.hh:
    Define ExtMachInst type that is used by the static inst in order to decode the instruction, given the context of being in pal mode or not.

    Redefine the number of Int registers, splitting it into NumIntArchRegs (32) and NumIntRegs (32 + 8 shadow registers).

    Change the dependence tags to reflect the integer registers include the 8 shadow registers.

    Define function to make an ExtMachInst.  Currently it is somewhat specific to Alpha; in the future it must be decided to make this more generic and possibly slower, or leave it specific to each architecture and ifdef it within the CPU.
arch/isa_parser.py:
    Have static insts decode on the ExtMachInst.
base/remote_gdb.cc:
    Support the automatic remapping of shadow registers.  Remote GDB must now look at the PC being read in order to tell if it should use the normal register indices or the shadow register indices.
cpu/o3/regfile.hh:
    Comment out the pal registers; they are now a part of the integer registers.
cpu/simple/cpu.cc:
    Create an ExtMachInst to decode on, based on the normal MachInst and the PC of the instructoin.
cpu/static_inst.hh:
    Change from MachInst to ExtMachInst to support shadow register renaming.

--HG--
extra : convert_revision : 1d23eabf735e297068e1917445a6348e9f8c88d5
2006-03-03 15:28:25 -05:00
arch Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included. 2006-03-03 15:28:25 -05:00
base Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included. 2006-03-03 15:28:25 -05:00
build Enable building only selected CPU models via new scons 2006-02-23 17:00:29 -05:00
configs Add support for multiple streams being configured with the INITPARAM 2005-11-29 18:06:15 -05:00
cpu Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included. 2006-03-03 15:28:25 -05:00
dev Merge ktlim@zizzer:/bk/m5 2006-02-28 15:16:24 -05:00
docs Many files: 2005-06-05 05:16:00 -04:00
encumbered/cpu/full Many files: 2005-06-05 05:16:00 -04:00
kern Merge ktlim@zizzer:/bk/m5 2006-02-28 15:16:24 -05:00
python Get rid of the code that delays PIO write accesses 2006-02-20 23:41:50 -05:00
sim Cleaned up and slightly reorganized the Fault class heirarchy. 2006-02-28 06:02:18 -05:00
test Minor fix for test/genini.py. 2005-10-31 22:41:14 -05:00
util fix some minor stats stuff 2006-02-26 23:06:21 -05:00
Doxyfile Fix minor doxygen issues. 2005-06-05 08:08:29 -04:00
LICENSE Fix a few broken or inconsistently formatted copyrights 2005-06-05 05:08:37 -04:00
README More documentation for 1.1 release. 2005-10-06 13:59:05 -04:00
RELEASE_NOTES More documentation for 1.1 release. 2005-10-06 13:59:05 -04:00
SConscript Changed targetarch to just arch. 2006-02-27 05:35:43 -05:00

README 

This is release m5_1.1 of the M5 simulator.

This file contains brief "getting started" instructions.  For more
information, see http://m5.eecs.umich.edu.  If you have questions,
please send mail to m5sim-users@lists.sourceforge.net.

WHAT'S INCLUDED (AND NOT)
-------------------------

The basic source release includes these subdirectories:
 - m5: the simulator itself
 - m5-test: regression tests
 - ext: less-common external packages needed to build m5
 - alpha-system: source for Alpha console and PALcode

To run full-system simulations, you will need compiled console,
PALcode, and kernel binaries and one or more disk images.  These files
are collected in a separate archive, m5_system_1.1.tar.bz2.  This file
is included on the CD release, or you can download it separately from
Sourceforge.

M5 supports Linux 2.4/2.6, FreeBSD, and the proprietary Compaq/HP
Tru64 version of Unix. We are able to distribute Linux and FreeBSD
bootdisks, but we are unable to distribute bootable disk images of
Tru64 Unix. If you have a Tru64 license and are interested in
obtaining disk images, contact us at m5-dev@eecs.umich.edu.

The CD release includes a few extra goodies, such as a tar file
containing doxygen-generated HTML documentation (html-docs.tar.gz), a
set of Linux source patches (linux_m5-2.6.8.1.diff), and the scons
program needed to build M5.  If you do not have the CD, the same HTML
documentation is available online at http://m5.eecs.umich.edu/docs,
the Linux source patches are available at
http://m5.eecs.umich.edu/dist/linux_m5-2.6.8.1.diff, and the scons
program is available from http://www.scons.org.

WHAT'S NEEDED
-------------
- GCC version 3.3 or newer
- Python 2.3 or newer
- SCons 0.96.1 or newer (see http://www.scons.org)

WHAT'S RECOMMENDED
------------------
- MySQL (for statistics complex statistics storage/retrieval)
- Python-MysqlDB (for statistics analysis) 

GETTING STARTED
---------------

There are two different build targets and three optimizations levels:

Target:
-------
ALPHA_SE - Syscall emulation simulation
ALPHA_FS - Full system simulation

Optimization:
-------------
m5.debug - debug version of the code with tracing and without optimization
m5.opt   - optimized version of code with tracing
m5.fast  - optimized version of the code without tracing and asserts

Different targets are built in different subdirectories of m5/build.
Binaries with the same target but different optimization levels share
the same directory.  Note that you can build m5 in any directory you
choose;p just configure the target directory using the 'mkbuilddir'
script in m5/build.

The following steps will build and test the simulator.  The variable
"$top" refers to the top directory where you've unpacked the files,
i.e., the one containing the m5, m5-test, and ext directories.  If you
have a multiprocessor system, you should give scons a "-j N" argument (like
make) to run N jobs in parallel.

To build and test the syscall-emulation simulator:

	cd $top/m5/build
	scons ALPHA_SE/test/opt/quick

This process takes under 10 minutes on a dual 3GHz Xeon system (using
the '-j 4' option).

To build and test the full-system simulator:

1. Unpack the full-system binaries from m5_system_1.1.tar.bz2.  (See
   above for directions on obtaining this file if you don't have it.)
   This package includes disk images and kernel, palcode, and console
   binaries for Linux and FreeBSD.
2. Edit the SYSTEMDIR search path in $top/m5-test/SysPaths.py to
   include the path to your local copy of the binaries.
3. In $top/m5/build, run "scons ALPHA_FS/test/opt/quick".

This process also takes under 10 minutes on a dual 3GHz Xeon system
(again using the '-j 4' option).