dc8018a5c3
Result of running 'hg m5style --skip-all --fix-white -a'.
139 lines
4.9 KiB
C++
139 lines
4.9 KiB
C++
/*
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* Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
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* Copyright (c) 2009-2010 Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "cpu/testers/directedtest/DirectedGenerator.hh"
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#include "cpu/testers/directedtest/InvalidateGenerator.hh"
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#include "cpu/testers/directedtest/RubyDirectedTester.hh"
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#include "debug/DirectedTest.hh"
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InvalidateGenerator::InvalidateGenerator(const Params *p)
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: DirectedGenerator(p)
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{
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//
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// First, issue loads to bring the block into S state
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//
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m_status = InvalidateGeneratorStatus_Load_Waiting;
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m_active_read_node = 0;
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m_active_inv_node = 0;
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m_address = 0x0;
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m_addr_increment_size = p->addr_increment_size;
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}
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InvalidateGenerator::~InvalidateGenerator()
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{
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}
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bool
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InvalidateGenerator::initiate()
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{
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MasterPort* port;
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Request::Flags flags;
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PacketPtr pkt;
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Packet::Command cmd;
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// For simplicity, requests are assumed to be 1 byte-sized
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Request *req = new Request(m_address, 1, flags, masterId);
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//
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// Based on the current state, issue a load or a store
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//
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if (m_status == InvalidateGeneratorStatus_Load_Waiting) {
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DPRINTF(DirectedTest, "initiating read\n");
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cmd = MemCmd::ReadReq;
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port = m_directed_tester->getCpuPort(m_active_read_node);
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pkt = new Packet(req, cmd);
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} else if (m_status == InvalidateGeneratorStatus_Inv_Waiting) {
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DPRINTF(DirectedTest, "initiating invalidating write\n");
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cmd = MemCmd::WriteReq;
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port = m_directed_tester->getCpuPort(m_active_inv_node);
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pkt = new Packet(req, cmd);
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} else {
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panic("initiate was unexpectedly called\n");
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}
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pkt->allocate();
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if (port->sendTimingReq(pkt)) {
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DPRINTF(DirectedTest, "initiating request - successful\n");
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if (m_status == InvalidateGeneratorStatus_Load_Waiting) {
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m_status = InvalidateGeneratorStatus_Load_Pending;
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} else {
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m_status = InvalidateGeneratorStatus_Inv_Pending;
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}
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return true;
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} else {
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// If the packet did not issue, must delete
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// Note: No need to delete the data, the packet destructor
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// will delete it
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delete pkt->req;
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delete pkt;
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DPRINTF(DirectedTest, "failed to issue request - sequencer not ready\n");
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return false;
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}
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}
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void
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InvalidateGenerator::performCallback(uint32_t proc, Addr address)
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{
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assert(m_address == address);
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if (m_status == InvalidateGeneratorStatus_Load_Pending) {
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assert(m_active_read_node == proc);
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m_active_read_node++;
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//
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// Once all cpus have the block in S state, issue the invalidate
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//
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if (m_active_read_node == m_num_cpus) {
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m_status = InvalidateGeneratorStatus_Inv_Waiting;
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m_active_read_node = 0;
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} else {
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m_status = InvalidateGeneratorStatus_Load_Waiting;
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}
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} else if (m_status == InvalidateGeneratorStatus_Inv_Pending) {
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assert(m_active_inv_node == proc);
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m_active_inv_node++;
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if (m_active_inv_node == m_num_cpus) {
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m_address += m_addr_increment_size;
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m_active_inv_node = 0;
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}
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//
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// Invalidate completed, send that info to the tester and restart
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// the cycle
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//
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m_directed_tester->incrementCycleCompletions();
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m_status = InvalidateGeneratorStatus_Load_Waiting;
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}
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}
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InvalidateGenerator *
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InvalidateGeneratorParams::create()
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{
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return new InvalidateGenerator(this);
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}
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