122 lines
3.5 KiB
C++
122 lines
3.5 KiB
C++
/*
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* Copyright (c) 2013 ARM Limited
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* Copyright (c) 2014-2015 Sven Karlsson
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2016 The University of Virginia
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Andreas Hansson
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* Sven Karlsson
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* Alec Roelke
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*/
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#ifndef __ARCH_RISCV_UTILITY_HH__
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#define __ARCH_RISCV_UTILITY_HH__
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#include <cmath>
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#include <cstdint>
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#include "base/types.hh"
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#include "cpu/static_inst.hh"
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#include "cpu/thread_context.hh"
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namespace RiscvISA
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{
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inline PCState
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buildRetPC(const PCState &curPC, const PCState &callPC)
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{
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PCState retPC = callPC;
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retPC.advance();
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retPC.pc(curPC.npc());
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return retPC;
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}
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inline uint64_t
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getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
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{
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return 0;
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}
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inline void startupCPU(ThreadContext *tc, int cpuId)
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{
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}
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inline void
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copyRegs(ThreadContext *src, ThreadContext *dest)
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{
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// First loop through the integer registers.
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for (int i = 0; i < NumIntRegs; ++i)
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dest->setIntReg(i, src->readIntReg(i));
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// Lastly copy PC/NPC
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dest->pcState(src->pcState());
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}
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inline void
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skipFunction(ThreadContext *tc)
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{
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panic("Not Implemented for Riscv");
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}
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inline void
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advancePC(PCState &pc, const StaticInstPtr &inst)
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{
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inst->advancePC(pc);
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}
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static inline bool
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inUserMode(ThreadContext *tc)
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{
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return true;
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}
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inline uint64_t
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getExecutingAsid(ThreadContext *tc)
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{
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return 0;
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}
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inline void
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initCPU(ThreadContext *, int cpuId)
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{
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panic("initCPU not implemented for Riscv.\n");
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}
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} // namespace RiscvISA
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#endif // __ARCH_RISCV_UTILITY_HH__
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