57 lines
2.3 KiB
C++
57 lines
2.3 KiB
C++
// -*- mode:c++ -*-
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// Copyright (c) 2015 RISC-V Foundation
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// Copyright (c) 2016 The University of Virginia
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met: redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer;
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// redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution;
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// neither the name of the copyright holders nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Authors: Maxwell Walter
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// Alec Roelke
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def operand_types {{
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'sb' : 'int8_t',
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'ub' : 'uint8_t',
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'sh' : 'int16_t',
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'uh' : 'uint16_t',
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'sw' : 'int32_t',
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'uw' : 'uint32_t',
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'sd' : 'int64_t',
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'ud' : 'uint64_t',
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}};
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def operands {{
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#General Purpose Integer Reg Operands
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'Rd': ('IntReg', 'ud', 'RD', 'IsInteger', 1),
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'Rs1': ('IntReg', 'ud', 'RS1', 'IsInteger', 2),
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'Rs2': ('IntReg', 'ud', 'RS2', 'IsInteger', 3),
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#Memory Operand
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'Mem': ('Mem', 'ud', None, ('IsMemRef', 'IsLoad', 'IsStore'), 5),
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#Program Counter Operands
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'PC': ('PCState', 'ud', 'pc', (None, None, 'IsControl'), 7),
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'NPC': ('PCState', 'ud', 'npc', (None, None, 'IsControl'), 8),
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}};
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