Steve Reinhardt d3fba5aa30 Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing) ... and PhysicalMemory. *No* support for caches or O3CPU. Note that properly setting cpu_id on all CPUs is now required for correct operation. src/arch/SConscript: src/base/traceflags.py: src/cpu/base.hh: src/cpu/simple/atomic.cc: src/cpu/simple/timing.cc: src/cpu/simple/timing.hh: src/mem/physical.cc: src/mem/physical.hh: src/mem/request.hh: src/python/m5/objects/BaseCPU.py: tests/configs/simple-atomic.py: tests/configs/simple-timing.py: tests/configs/tsunami-simple-atomic-dual.py: tests/configs/tsunami-simple-atomic.py: tests/configs/tsunami-simple-timing-dual.py: tests/configs/tsunami-simple-timing.py: Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing) and PhysicalMemory. *No* support for caches or O3CPU. --HG-- extra : convert_revision : 6ce982d44924cc477e049b9adf359818908e72be		2006-10-08 10:53:24 -07:00
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m5	Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)	2006-10-08 10:53:24 -07:00
SConscript	Migrate most of main() and and all option parsing to python	2006-07-10 23:00:13 -04:00