gem5/src/arch/x86/isa
Gabe Black e5e5b0119d X86: Fix for compilation bug with new cache code.
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extra : convert_revision : 073c6db0796cd2c11b8293b382b438a2a959b821
2007-08-01 12:49:58 -07:00
..
decoder Add a flag to indicate an instruction triggers a syscall in SE mode. 2007-07-31 17:34:08 -07:00
formats X86: missed a file which adds a "fold" bit. 2007-07-30 13:25:38 -07:00
insts X86: Set up RIP relative LEA instructions operands correctly. 2007-07-30 15:41:08 -07:00
microops X86: Fix for compilation bug with new cache code. 2007-08-01 12:49:58 -07:00
bitfields.isa X86: Add a bitfield to indicate whether or not an REX prefix was present. 2007-07-30 13:17:34 -07:00
includes.isa Actually include miscregs.hh 2007-07-17 13:30:23 -07:00
macroop.isa Make the operand size reflect the size specifier on the operand tags, and implement NEG 2007-07-23 01:07:49 +00:00
main.isa Pull some hard coded base classes out of the isa description. 2007-07-14 17:14:19 -07:00
microasm.isa Add symbols for each of the flags a microop could set and each condition it could check. 2007-07-17 15:27:28 -07:00
operands.isa X86: Take into account the regular registers and the microcode registers when decided whether or not to fold. 2007-07-30 15:38:40 -07:00
outputblock.isa Pull some hard coded base classes out of the isa description. 2007-07-14 17:14:19 -07:00
specialize.isa X86: Allow RIP relative decode on -all- memory forms of operands. 2007-07-30 15:39:25 -07:00