124 lines
4.2 KiB
C++
124 lines
4.2 KiB
C++
/*
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* Copyright (c) 2014-2015 Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* For use for simulation and test purposes only
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Author: John Kalamatianos, Sooraj Puthoor
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*/
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#ifndef __GLOBAL_MEMORY_PIPELINE_HH__
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#define __GLOBAL_MEMORY_PIPELINE_HH__
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#include <queue>
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#include <string>
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#include "gpu-compute/misc.hh"
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#include "params/ComputeUnit.hh"
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#include "sim/stats.hh"
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/*
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* @file global_memory_pipeline.hh
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*
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* The global memory pipeline issues newly created global memory packets
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* from the pipeline to DTLB. The exec() method of the memory packet issues
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* the packet to the DTLB if there is space available in the return fifo.
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* This stage also retires previously issued loads and stores that have
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* returned from the memory sub-system.
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*/
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class ComputeUnit;
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class GlobalMemPipeline
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{
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public:
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GlobalMemPipeline(const ComputeUnitParams *params);
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void init(ComputeUnit *cu);
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void exec();
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template<typename c0, typename c1> void doGmReturn(GPUDynInstPtr m);
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std::queue<GPUDynInstPtr> &getGMReqFIFO() { return gmIssuedRequests; }
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std::queue<GPUDynInstPtr> &getGMStRespFIFO() { return gmReturnedStores; }
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std::queue<GPUDynInstPtr> &getGMLdRespFIFO() { return gmReturnedLoads; }
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bool
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isGMLdRespFIFOWrRdy() const
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{
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return gmReturnedLoads.size() < gmQueueSize;
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}
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bool
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isGMStRespFIFOWrRdy() const
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{
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return gmReturnedStores.size() < gmQueueSize;
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}
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bool
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isGMReqFIFOWrRdy(uint32_t pendReqs=0) const
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{
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return (gmIssuedRequests.size() + pendReqs) < gmQueueSize;
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}
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const std::string &name() const { return _name; }
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void regStats();
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private:
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ComputeUnit *computeUnit;
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std::string _name;
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int gmQueueSize;
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// number of cycles of delaying the update of a VGPR that is the
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// target of a load instruction (or the load component of an atomic)
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// The delay is due to VRF bank conflicts
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Stats::Scalar loadVrfBankConflictCycles;
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// Counters to track the inflight loads and stores
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// so that we can provide the proper backpressure
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// on the number of inflight memory operations.
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int inflightStores;
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int inflightLoads;
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// The size of global memory.
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int globalMemSize;
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// Global Memory Request FIFO: all global memory requests
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// are issued to this FIFO from the memory pipelines
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std::queue<GPUDynInstPtr> gmIssuedRequests;
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// Globa Store Response FIFO: all responses of global memory
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// stores are sent to this FIFO from TCP
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std::queue<GPUDynInstPtr> gmReturnedStores;
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// Global Load Response FIFO: all responses of global memory
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// loads are sent to this FIFO from TCP
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std::queue<GPUDynInstPtr> gmReturnedLoads;
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};
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#endif // __GLOBAL_MEMORY_PIPELINE_HH__
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