61d95de4c8
SConscript:
arch/isa_parser.py:
cpu/base_dyn_inst.cc:
Remove OOO CPU stuff.
arch/alpha/faults.hh:
Add fake memory fault. This will be removed eventually.
arch/alpha/isa_desc:
Change EA comp and Mem accessor to be const StaticInstPtrs.
cpu/base_dyn_inst.hh:
Update read/write calls to use load queue and store queue indices.
cpu/beta_cpu/alpha_dyn_inst.hh:
Change to const StaticInst in the register accessors.
cpu/beta_cpu/alpha_dyn_inst_impl.hh:
Update syscall code with thread numbers.
cpu/beta_cpu/alpha_full_cpu.hh:
Alter some of the full system code so it will compile without errors.
cpu/beta_cpu/alpha_full_cpu_builder.cc:
Created a DerivAlphaFullCPU class so I can instantiate different CPUs that have different template parameters.
cpu/beta_cpu/alpha_full_cpu_impl.hh:
Update some of the full system code so it compiles.
cpu/beta_cpu/alpha_params.hh:
cpu/beta_cpu/fetch_impl.hh:
Remove asid.
cpu/beta_cpu/comm.hh:
Remove global history field.
cpu/beta_cpu/commit.hh:
Comment out rename map.
cpu/beta_cpu/commit_impl.hh:
Update some of the full system code so it compiles. Also change it so that it handles memory instructions properly.
cpu/beta_cpu/cpu_policy.hh:
Removed IQ from the IEW template parameter to make it more uniform.
cpu/beta_cpu/decode.hh:
Add debug function.
cpu/beta_cpu/decode_impl.hh:
Slight updates for decode in the case where it causes a squash.
cpu/beta_cpu/fetch.hh:
cpu/beta_cpu/rob.hh:
Comment out unneccessary code.
cpu/beta_cpu/full_cpu.cc:
Changed some of the full system code so it compiles. Updated exec contexts and so forth to hopefully make multithreading easier.
cpu/beta_cpu/full_cpu.hh:
Updated some of the full system code to make it compile.
cpu/beta_cpu/iew.cc:
Removed IQ from template parameter to IEW.
cpu/beta_cpu/iew.hh:
Removed IQ from template parameter to IEW. Updated IEW to recognize the Load/Store queue.
cpu/beta_cpu/iew_impl.hh:
New handling of memory instructions through the Load/Store queue.
cpu/beta_cpu/inst_queue.hh:
Updated comment.
cpu/beta_cpu/inst_queue_impl.hh:
Slightly different handling of memory instructions due to Load/Store queue.
cpu/beta_cpu/regfile.hh:
Updated full system code so it compiles.
cpu/beta_cpu/rob_impl.hh:
Moved some code around; no major functional changes.
cpu/ooo_cpu/ooo_cpu.hh:
Slight updates to OOO CPU; still does not work.
cpu/static_inst.hh:
Remove OOO CPU stuff. Change ea comp and mem acc to return const StaticInst.
kern/kernel_stats.hh:
Extra forward declares added due to compile error.
--HG--
extra : convert_revision : 594a7cdbe57f6c2bda7d08856fcd864604a6238e
60 lines
1.8 KiB
C++
60 lines
1.8 KiB
C++
#ifndef __CPU_BETA_CPU_CPU_POLICY_HH__
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#define __CPU_BETA_CPU_CPU_POLICY_HH__
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#include "cpu/beta_cpu/bpred_unit.hh"
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#include "cpu/beta_cpu/inst_queue.hh"
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#include "cpu/beta_cpu/regfile.hh"
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#include "cpu/beta_cpu/free_list.hh"
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#include "cpu/beta_cpu/rename_map.hh"
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#include "cpu/beta_cpu/rob.hh"
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#include "cpu/beta_cpu/store_set.hh"
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#include "cpu/beta_cpu/mem_dep_unit.hh"
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#include "cpu/beta_cpu/ldstq.hh"
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#include "cpu/beta_cpu/fetch.hh"
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#include "cpu/beta_cpu/decode.hh"
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#include "cpu/beta_cpu/rename.hh"
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#include "cpu/beta_cpu/iew.hh"
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#include "cpu/beta_cpu/commit.hh"
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#include "cpu/beta_cpu/comm.hh"
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template<class Impl>
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struct SimpleCPUPolicy
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{
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typedef TwobitBPredUnit<Impl> BPredUnit;
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typedef PhysRegFile<Impl> RegFile;
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typedef SimpleFreeList FreeList;
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typedef SimpleRenameMap RenameMap;
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typedef ROB<Impl> ROB;
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typedef InstructionQueue<Impl> IQ;
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typedef MemDepUnit<StoreSet, Impl> MemDepUnit;
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typedef LDSTQ<Impl> LDSTQ;
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typedef SimpleFetch<Impl> Fetch;
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typedef SimpleDecode<Impl> Decode;
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typedef SimpleRename<Impl> Rename;
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typedef SimpleIEW<Impl> IEW;
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typedef SimpleCommit<Impl> Commit;
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/** The struct for communication between fetch and decode. */
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typedef SimpleFetchSimpleDecode<Impl> FetchStruct;
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/** The struct for communication between decode and rename. */
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typedef SimpleDecodeSimpleRename<Impl> DecodeStruct;
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/** The struct for communication between rename and IEW. */
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typedef SimpleRenameSimpleIEW<Impl> RenameStruct;
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/** The struct for communication between IEW and commit. */
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typedef SimpleIEWSimpleCommit<Impl> IEWStruct;
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/** The struct for communication within the IEW stage. */
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typedef IssueStruct<Impl> IssueStruct;
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/** The struct for all backwards communication. */
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typedef TimeBufStruct TimeStruct;
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};
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#endif //__CPU_BETA_CPU_CPU_POLICY_HH__
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