b5736ba4ef
A few prior changesets have changed the gem5 output in a way that wont cause errors but may be confusing for someone trying to debug the regressions. Ones that I caught were: - no more "warn: <hash address" - typo in the ALPHA Prefetch unimplemented warning Additionaly, the last updated stats changes rearrange the ordering of the stats output even though they are still correct stats (gem5 is smart enough to detect this). All the regressions pass w/the same stats even though it looks like they are being changed.
66 lines
6.3 KiB
Text
66 lines
6.3 KiB
Text
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---------- Begin Simulation Statistics ----------
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sim_seconds 0.044221 # Number of seconds simulated
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sim_ticks 44221003000 # Number of ticks simulated
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sim_freq 1000000000000 # Frequency of simulated ticks
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host_inst_rate 3266324 # Simulator instruction rate (inst/s)
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host_tick_rate 1635033806 # Simulator tick rate (ticks/s)
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host_mem_usage 192576 # Number of bytes of host memory used
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host_seconds 27.05 # Real time elapsed on the host
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sim_insts 88340673 # Number of instructions simulated
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system.cpu.dtb.fetch_hits 0 # ITB hits
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system.cpu.dtb.fetch_misses 0 # ITB misses
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system.cpu.dtb.fetch_acv 0 # ITB acv
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system.cpu.dtb.fetch_accesses 0 # ITB accesses
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system.cpu.dtb.read_hits 20276638 # DTB read hits
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system.cpu.dtb.read_misses 90148 # DTB read misses
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system.cpu.dtb.read_acv 0 # DTB read access violations
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system.cpu.dtb.read_accesses 20366786 # DTB read accesses
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system.cpu.dtb.write_hits 14613377 # DTB write hits
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system.cpu.dtb.write_misses 7252 # DTB write misses
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system.cpu.dtb.write_acv 0 # DTB write access violations
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system.cpu.dtb.write_accesses 14620629 # DTB write accesses
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system.cpu.dtb.data_hits 34890015 # DTB hits
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system.cpu.dtb.data_misses 97400 # DTB misses
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system.cpu.dtb.data_acv 0 # DTB access violations
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system.cpu.dtb.data_accesses 34987415 # DTB accesses
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system.cpu.itb.fetch_hits 88438073 # ITB hits
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system.cpu.itb.fetch_misses 3934 # ITB misses
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system.cpu.itb.fetch_acv 0 # ITB acv
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system.cpu.itb.fetch_accesses 88442007 # ITB accesses
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system.cpu.itb.read_hits 0 # DTB read hits
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system.cpu.itb.read_misses 0 # DTB read misses
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system.cpu.itb.read_acv 0 # DTB read access violations
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system.cpu.itb.read_accesses 0 # DTB read accesses
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system.cpu.itb.write_hits 0 # DTB write hits
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system.cpu.itb.write_misses 0 # DTB write misses
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system.cpu.itb.write_acv 0 # DTB write access violations
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system.cpu.itb.write_accesses 0 # DTB write accesses
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system.cpu.itb.data_hits 0 # DTB hits
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system.cpu.itb.data_misses 0 # DTB misses
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system.cpu.itb.data_acv 0 # DTB access violations
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system.cpu.itb.data_accesses 0 # DTB accesses
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system.cpu.workload.num_syscalls 4583 # Number of system calls
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system.cpu.numCycles 88442007 # number of cpu cycles simulated
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system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
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system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
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system.cpu.num_insts 88340673 # Number of instructions executed
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system.cpu.num_int_alu_accesses 78039444 # Number of integer alu accesses
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system.cpu.num_fp_alu_accesses 267757 # Number of float alu accesses
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system.cpu.num_func_calls 3321606 # number of times a function call or return occured
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system.cpu.num_conditional_control_insts 8920848 # number of instructions that are conditional controls
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system.cpu.num_int_insts 78039444 # number of integer instructions
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system.cpu.num_fp_insts 267757 # number of float instructions
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system.cpu.num_int_register_reads 105931758 # number of times the integer registers were read
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system.cpu.num_int_register_writes 52319251 # number of times the integer registers were written
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system.cpu.num_fp_register_reads 229023 # number of times the floating registers were read
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system.cpu.num_fp_register_writes 227630 # number of times the floating registers were written
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system.cpu.num_mem_refs 34987415 # number of memory refs
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system.cpu.num_load_insts 20366786 # Number of load instructions
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system.cpu.num_store_insts 14620629 # Number of store instructions
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system.cpu.num_idle_cycles 0 # Number of idle cycles
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system.cpu.num_busy_cycles 88442007 # Number of busy cycles
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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---------- End Simulation Statistics ----------
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