SimObjects not yet updated: - Process and subclasses - BaseCPU and subclasses The SimObject(const std::string &name) constructor was removed. Subclasses that still rely on that behavior must call the parent initializer as : SimObject(makeParams(name)) --HG-- extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
83 lines
2.7 KiB
C++
83 lines
2.7 KiB
C++
/*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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* Ron Dreslinski
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*/
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#include <string>
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#include <vector>
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#include "cpu/base.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/intr_control.hh"
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#include "sim/sim_object.hh"
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using namespace std;
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IntrControl::IntrControl(const Params *p)
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: SimObject(p), sys(p->sys)
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{}
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void
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IntrControl::post(int int_num, int index)
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{
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std::vector<ThreadContext *> &tcvec = sys->threadContexts;
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BaseCPU *temp = tcvec[0]->getCpuPtr();
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temp->post_interrupt(int_num, index);
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}
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void
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IntrControl::post(int cpu_id, int int_num, int index)
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{
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std::vector<ThreadContext *> &tcvec = sys->threadContexts;
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BaseCPU *temp = tcvec[cpu_id]->getCpuPtr();
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temp->post_interrupt(int_num, index);
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}
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void
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IntrControl::clear(int int_num, int index)
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{
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std::vector<ThreadContext *> &tcvec = sys->threadContexts;
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BaseCPU *temp = tcvec[0]->getCpuPtr();
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temp->clear_interrupt(int_num, index);
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}
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void
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IntrControl::clear(int cpu_id, int int_num, int index)
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{
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std::vector<ThreadContext *> &tcvec = sys->threadContexts;
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BaseCPU *temp = tcvec[cpu_id]->getCpuPtr();
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temp->clear_interrupt(int_num, index);
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}
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IntrControl *
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IntrControlParams::create()
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{
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return new IntrControl(this);
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}
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