gem5/src/arch/sparc/isa
Steve Reinhardt 1b6355c895 cpu. arch: add initiateMemRead() to ExecContext interface
For historical reasons, the ExecContext interface had a single
function, readMem(), that did two different things depending on
whether the ExecContext supported atomic memory mode (i.e.,
AtomicSimpleCPU) or timing memory mode (all the other models).
In the former case, it actually performed a memory read; in the
latter case, it merely initiated a read access, and the read
completion did not happen until later when a response packet
arrived from the memory system.

This led to some confusing things, including timing accesses
being required to provide a pointer for the return data even
though that pointer was only used in atomic mode.

This patch splits this interface, adding a new initiateMemRead()
function to the ExecContext interface to replace the timing-mode
use of readMem().

For consistency and clarity, the readMemTiming() helper function
in the ISA definitions is renamed to initiateMemRead() as well.
For x86, where the access size is passed in explicitly, we can
also get rid of the data parameter at this level.  For other ISAs,
where the access size is determined from the type of the data
parameter, we have to keep the parameter for that purpose.
2016-01-17 18:27:46 -08:00
..
formats cpu. arch: add initiateMemRead() to ExecContext interface 2016-01-17 18:27:46 -08:00
base.isa arch: Use shared_ptr for all Faults 2014-10-16 05:49:51 -04:00
bitfields.isa Style: Replace some tabs with spaces. 2010-12-20 16:24:40 -05:00
decoder.isa scons: Enable -Wextra by default 2016-01-11 05:52:20 -05:00
includes.isa ISA: Make the decode function part of the ISA's decoder. 2012-05-25 00:55:24 -07:00
main.isa SPARC: Clean up some historical style issues. 2010-11-11 02:03:58 -08:00
operands.isa SPARC: Make PSTATE and HPSTATE a BitUnion. 2012-02-11 14:16:38 -08:00