133 lines
4.1 KiB
C++
133 lines
4.1 KiB
C++
/*
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* Copyright (c) 2006-2007 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#ifndef TRACECHILD_SPARC_HH
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#define TRACECHILD_SPARC_HH
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#include <asm-sparc64/reg.h>
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#include <assert.h>
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#include <ostream>
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#include <stdint.h>
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#include <string>
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#include <sys/ptrace.h>
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#include <sys/types.h>
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#include "tracechild.hh"
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struct regs;
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class SparcTraceChild : public TraceChild
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{
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public:
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enum RegNum
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{
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//Global registers
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G0, G1, G2, G3, G4, G5, G6, G7,
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//Output registers
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O0, O1, O2, O3, O4, O5, O6, O7,
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//Local registers
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L0, L1, L2, L3, L4, L5, L6, L7,
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//Input registers
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I0, I1, I2, I3, I4, I5, I6, I7,
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//Floating point
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F0, F2, F4, F6, F8, F10, F12, F14,
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F16, F18, F20, F22, F24, F26, F28, F30,
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F32, F34, F36, F38, F40, F42, F44, F46,
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F48, F50, F52, F54, F56, F58, F60, F62,
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//Miscelaneous
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FSR, FPRS, PC, NPC, Y, CWP, PSTATE, ASI, CCR,
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numregs
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};
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private:
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char printBuffer[256];
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static std::string regNames[numregs];
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regs theregs;
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regs oldregs;
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fpu thefpregs;
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fpu oldfpregs;
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uint64_t locals[8];
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uint64_t oldLocals[8];
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uint64_t inputs[8];
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uint64_t oldInputs[8];
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bool regDiffSinceUpdate[numregs];
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//This calculates where the pc might go after the current instruction.
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//while this equals npc for most instructions, it doesn't for all of
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//them. The return value is the number of actual potential targets.
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int getTargets(uint32_t inst, uint64_t pc, uint64_t npc,
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uint64_t &target1, uint64_t &target2);
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protected:
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bool update(int pid);
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public:
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SparcTraceChild();
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bool sendState(int socket);
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int getNumRegs()
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{
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return numregs;
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}
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bool diffSinceUpdate(int num)
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{
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assert(num < numregs && num >= 0);
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return regDiffSinceUpdate[num];
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}
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std::string getRegName(int num)
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{
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assert(num < numregs && num >= 0);
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return regNames[num];
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}
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int64_t getRegVal(int num);
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int64_t getOldRegVal(int num);
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bool step();
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uint64_t getPC()
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{
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return getRegVal(PC);
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}
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uint64_t getSP()
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{
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return getRegVal(O6);
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}
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char * printReg(int num);
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std::ostream & outputStartState(std::ostream & os);
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};
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#endif
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