e1cbe33c72
Changeset 5ca6098b9560 accidentally broke the m5 utility. This changeset adds the missing co-processor call used to trigger the pseudo-op in ARM mode and fixes an alignment issue that caused some pseudo-ops to leave thumb mode.
123 lines
4.6 KiB
ArmAsm
123 lines
4.6 KiB
ArmAsm
/*
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* Copyright (c) 2010 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2003-2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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* Ali Saidi
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* Chander Sudanthi
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* Andreas Sandberg
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*/
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.syntax unified
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#ifdef __thumb__
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.thumb
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#endif
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#include "m5ops.h"
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.text
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.macro simple_op name, func, subfunc
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.align 2
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.globl \name
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\name:
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/* First, try to trap into m5 using the m5-kvm hypercall
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* hack. The bxj will become a branch to the fallback code
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* if it is executed in the normal m5 environment.
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*/
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push {lr}
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#ifdef __thumb__
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adr lr, 1f+1
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#else
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adr lr, 1f
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#endif
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ldr ip, =((((\func) & 0xFF) << 8) | ((\subfunc) & 0xFF))
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bxj lr
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pop {pc}
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/* Old-style m5 pseudo instruction using CP1 accesses */
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1:
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#ifdef __thumb__
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.short 0xEE00 | \func
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.short 0x0110 | (\subfunc << 12)
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#else
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.long (0xEE000110 | (\func << 16) | (\subfunc << 12))
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#endif
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pop {pc}
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.endm
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#define SIMPLE_OP(name, func, subfunc) simple_op name, func, subfunc
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SIMPLE_OP(arm, arm_func, 0)
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SIMPLE_OP(quiesce, quiesce_func, 0)
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SIMPLE_OP(quiesceNs, quiescens_func, 0)
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SIMPLE_OP(quiesceCycle, quiescecycle_func, 0)
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SIMPLE_OP(quiesceTime, quiescetime_func, 0)
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SIMPLE_OP(rpns, rpns_func, 0)
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SIMPLE_OP(wakeCPU, wakecpu_func, 0)
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SIMPLE_OP(m5_exit, exit_func, 0)
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SIMPLE_OP(m5_initparam, initparam_func, 0)
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SIMPLE_OP(m5_loadsymbol, loadsymbol_func, 0)
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SIMPLE_OP(m5_reset_stats, resetstats_func, 0)
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SIMPLE_OP(m5_dump_stats, dumpstats_func, 0)
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SIMPLE_OP(m5_dumpreset_stats, dumprststats_func, 0)
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SIMPLE_OP(m5_checkpoint, ckpt_func, 0)
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SIMPLE_OP(m5_readfile, readfile_func, 0)
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SIMPLE_OP(m5_writefile, writefile_func, 0)
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SIMPLE_OP(m5_debugbreak, debugbreak_func, 0)
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SIMPLE_OP(m5_switchcpu, switchcpu_func, 0)
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SIMPLE_OP(m5_addsymbol, addsymbol_func, 0)
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SIMPLE_OP(m5_panic, panic_func, 0)
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SIMPLE_OP(m5_work_begin, work_begin_func, 0)
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SIMPLE_OP(m5_work_end, work_end_func, 0)
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SIMPLE_OP(m5a_bsm, annotate_func, an_bsm)
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SIMPLE_OP(m5a_esm, annotate_func, an_esm)
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SIMPLE_OP(m5a_begin, annotate_func, an_begin)
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SIMPLE_OP(m5a_end, annotate_func, an_end)
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SIMPLE_OP(m5a_q, annotate_func, an_q)
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SIMPLE_OP(m5a_rq, annotate_func, an_rq)
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SIMPLE_OP(m5a_dq, annotate_func, an_dq)
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SIMPLE_OP(m5a_wf, annotate_func, an_wf)
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SIMPLE_OP(m5a_we, annotate_func, an_we)
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SIMPLE_OP(m5a_ws, annotate_func, an_ws)
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SIMPLE_OP(m5a_sq, annotate_func, an_sq)
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SIMPLE_OP(m5a_aq, annotate_func, an_aq)
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SIMPLE_OP(m5a_pq, annotate_func, an_pq)
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SIMPLE_OP(m5a_l, annotate_func, an_l)
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SIMPLE_OP(m5a_identify, annotate_func, an_identify)
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SIMPLE_OP(m5a_getid, annotate_func, an_getid)
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