Jiuyue Ma e1a5522a89 config, x86: Ensure that PCI devs get bridged to the memory bus ... This patch force IO device to be mapped to 0xC0000000-0xFFFF0000 by reserve anything between the end of memory and 3GB if memory is less than 3GB. It also statically bridge these address range to the IO bus, which guaranty access to pci address space will pass though bridge to iobus. Committed by: Nilay Vaish <nilay@cs.wisc.edu>		2014-07-17 12:05:41 +08:00
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boot	rcs scripts: remove bbench.rcS	2013-04-02 12:46:49 -04:00
common	config, x86: Ensure that PCI devs get bridged to the memory bus	2014-07-17 12:05:41 +08:00
dram	mem: Rename Bus to XBar to better reflect its behaviour	2014-09-20 17:18:32 -04:00
example	mem: Rename Bus to XBar to better reflect its behaviour	2014-09-20 17:18:32 -04:00
ruby	ruby: message buffers: significant changes	2014-09-01 16:55:47 -05:00
splash2	mem: Rename Bus to XBar to better reflect its behaviour	2014-09-20 17:18:32 -04:00
topologies	config: topologies: slight code refactor	2014-02-23 19:16:15 -06:00