gem5/src/sim
Gabe Black 91ca1b48e2 Merge zizzer:/bk/newmem
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 2398e48722dd71ddf270e93bd7b387078fb30e6b
2007-01-28 14:46:56 -05:00
..
async.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
builder.cc Move SimObject creation and Port connection loops 2006-06-13 23:19:28 -04:00
builder.hh fixes for gcc 4.1 2006-08-15 17:41:22 -04:00
byteswap.hh Merge zizzer:/bk/newmem 2007-01-27 01:59:20 -05:00
debug.cc Expose debugBreakCycle through swig and get rid of 2006-11-13 12:20:08 -08:00
debug.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
eventq.cc Move main control from C++ into Python. 2006-06-09 23:01:31 -04:00
eventq.hh Add new event priority for trace enable events so 2006-10-19 10:21:23 -07:00
faults.cc Tweak a few things for better page fault debugging. 2006-10-21 05:28:05 -04:00
faults.hh add syscall emulation page table fault so we can allocate more stack pages 2006-06-26 16:49:05 -04:00
host.hh While I'm waiting for legion to run make m5 compile with a few more compilers 2007-01-27 15:38:04 -05:00
main.cc move the swig initialization calls from src/sim/main.cc to 2006-12-21 15:49:16 -08:00
param.cc Stick the conversion of python to unix time with all of 2007-01-28 10:26:59 -08:00
param.hh Stick the conversion of python to unix time with all of 2007-01-28 10:26:59 -08:00
process.cc Merge zizzer.eecs.umich.edu:/bk/newmem 2007-01-22 22:31:48 -08:00
process.hh Added remote gdb objects to each process 2007-01-22 22:22:09 -08:00
pseudo_inst.cc Get rid of the ParamContext for pseudo instructions and move 2006-11-11 17:22:10 -08:00
pseudo_inst.hh Cleaned up remnants of ivlb and ivle 2006-11-06 20:49:48 -05:00
root.cc there are two main thrusts of this changeset. 2006-10-06 01:27:02 -04:00
serialize.cc Merge ktlim@zamp:./local/clean/o3-merge/m5 2006-09-30 23:43:23 -04:00
serialize.hh Take the name of the checkpoint directory in when calling checkpoint() or restoreCheckpoint(). 2006-07-07 16:46:08 -04:00
sim_events.cc there are two main thrusts of this changeset. 2006-10-06 01:27:02 -04:00
sim_events.hh there are two main thrusts of this changeset. 2006-10-06 01:27:02 -04:00
sim_exit.hh there are two main thrusts of this changeset. 2006-10-06 01:27:02 -04:00
sim_object.cc remove connectAll() and connect() code since it isn't used anymore. (The python does it all) 2006-10-31 13:23:49 -05:00
sim_object.hh remove connectAll() and connect() code since it isn't used anymore. (The python does it all) 2006-10-31 13:23:49 -05:00
startup.cc Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
startup.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
stat_control.cc fix the argument to m5.simulate() on a checkpoint. 2006-10-05 13:18:32 -04:00
stat_control.hh Merge ktlim@zamp:./local/clean/o3-merge/m5 2006-09-30 23:43:23 -04:00
stats.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
syscall_emul.cc Implement current working directory for LiveProcesses 2006-11-16 12:43:11 -08:00
syscall_emul.hh implement RUSAGE_CHILDREN for getrusage since it's trivial 2006-11-16 13:08:29 -08:00
syscallreturn.hh Move the SyscallReturn class into sim/syscallreturn.hh. Also move some miscregs into the integer register file so they get renamed. 2006-12-05 01:55:02 -05:00
system.cc Initial work to make remote gdb available in SE mode. This is completely untested. 2006-12-20 18:39:40 -05:00
system.hh Initial work to make remote gdb available in SE mode. This is completely untested. 2006-12-20 18:39:40 -05:00
vptr.hh Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh. 2006-06-06 17:32:21 -04:00