gem5/src/arch
Min Kyu Jeong e1168e72ca ARM: Fixed register flattening logic (FP_Base_DepTag was set too low)
When decoding a srs instruction, invalid mode encoding returns invalid instruction.
This can happen when garbage instructions are fetched from mispredicted path
2010-08-25 19:10:43 -05:00
..
alpha ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) 2010-08-25 19:10:43 -05:00
arm ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) 2010-08-25 19:10:43 -05:00
mips ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) 2010-08-25 19:10:43 -05:00
power ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) 2010-08-25 19:10:43 -05:00
sparc ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) 2010-08-25 19:10:43 -05:00
x86 ARM: Fixed register flattening logic (FP_Base_DepTag was set too low) 2010-08-25 19:10:43 -05:00
isa_parser.py ARM: Fix custom writer/reader code for non indexed operands. 2010-06-02 12:57:59 -05:00
micro_asm.py scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access 2009-09-22 15:24:16 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript X86: Get rid of unused file arguments.hh. 2010-08-22 18:42:23 -07:00