e1168e72ca
When decoding a srs instruction, invalid mode encoding returns invalid instruction. This can happen when garbage instructions are fetched from mispredicted path |
||
---|---|---|
.. | ||
alpha | ||
arm | ||
mips | ||
power | ||
sparc | ||
x86 | ||
isa_parser.py | ||
micro_asm.py | ||
micro_asm_test.py | ||
SConscript |