gem5/src
Korey Sewell e0fdd86fd9 mips: cleanup ISA-specific code
***
(1): get rid of expandForMT function
MIPS is the only ISA that cares about having a piece of ISA state integrate
multiple threads so add constants for MIPS and relieve the other ISAs from having
to define this. Also, InOrder was the only core that was actively calling
this function
* * *
(2): get rid of corespecific type
The CoreSpecific type was used as a proxy to pass in HW specific params to
a MIPS CPU, but since MIPS FS hasnt been touched for awhile, it makes sense
to not force every other ISA to use CoreSpecific as well use a special
reset function to set it. That probably should go in a PowerOn reset fault
 anyway.
2011-03-26 09:23:52 -04:00
..
arch mips: cleanup ISA-specific code 2011-03-26 09:23:52 -04:00
base base: disable FastAlloc in debug builds by default 2011-03-18 11:47:11 -07:00
cpu mips: cleanup ISA-specific code 2011-03-26 09:23:52 -04:00
dev Mem: Fix issue with dirty block being lost when entire block transferred to non-cache. 2011-03-17 19:20:19 -05:00
doxygen Fix up doxygen. 2006-08-14 19:25:07 -04:00
kern ARM: Detect and skip udelay() functions in linux kernel. 2011-03-17 19:20:20 -05:00
mem Ruby: Remove CacheMsg class from SLICC 2011-03-22 06:41:54 -05:00
python swig: get rid of m5.internal.random module (swig/random.i) 2011-03-18 11:47:15 -07:00
sim ARM: Add minimal ARM_SE support for m5threads. 2011-03-17 19:20:20 -05:00
unittest Unit tests: Convert the refcnttest unit test to use the new EXPECT macros. 2011-01-18 01:27:04 -08:00
Doxyfile Fix up doxygen. 2006-08-14 19:25:07 -04:00
SConscript SCons: Stop embedding the mercurial revision into the binary. 2011-03-11 11:27:36 -08:00