9b1e2db811
cpu/base_cpu.cc: cpu/base_cpu.hh: Convert the CPU stuff to use a params struct cpu/memtest/memtest.cc: The memory tester is really not a cpu, so don't derive from BaseCPU since it just makes things a pain in the butt. Keep track of max loads in the memtest class now that the base class doesn't do it for us. Don't have any default parameters. cpu/memtest/memtest.hh: The memory tester is really not a cpu, so don't derive from BaseCPU since it just makes things a pain in the butt. Keep track of max loads in the memtest class now that the base class doesn't do it for us. cpu/simple_cpu/simple_cpu.cc: Convert to use a params struct. remove default parameters cpu/simple_cpu/simple_cpu.hh: convert to use a params struct cpu/trace/opt_cpu.cc: cpu/trace/opt_cpu.hh: cpu/trace/trace_cpu.cc: cpu/trace/trace_cpu.hh: this isn't really a cpu. don't derive from BaseCPU objects/MemTest.mpy: we only need one max_loads parameter sim/main.cc: Don't check for the number of CPUs since we may be doing something else going on. If we don't have anything to simulate, the simulator will exit anyway. --HG-- extra : convert_revision : 2195a34a9ec90b5414324054ceb3bab643540dd5
316 lines
9.3 KiB
C++
316 lines
9.3 KiB
C++
/*
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* Copyright (c) 2002-2004 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <iostream>
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#include <string>
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#include <sstream>
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#include "base/cprintf.hh"
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#include "base/loader/symtab.hh"
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#include "base/misc.hh"
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#include "base/output.hh"
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#include "cpu/base_cpu.hh"
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#include "cpu/exec_context.hh"
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#include "sim/param.hh"
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#include "sim/sim_events.hh"
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using namespace std;
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vector<BaseCPU *> BaseCPU::cpuList;
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// This variable reflects the max number of threads in any CPU. Be
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// careful to only use it once all the CPUs that you care about have
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// been initialized
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int maxThreadsPerCPU = 1;
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#ifdef FULL_SYSTEM
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BaseCPU::BaseCPU(Params *p)
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: SimObject(p->name), frequency(p->freq), checkInterrupts(true),
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params(p), number_of_threads(p->numberOfThreads), system(p->system)
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#else
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BaseCPU::BaseCPU(Params *p)
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: SimObject(p->name), params(p), number_of_threads(p->numberOfThreads)
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#endif
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{
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// add self to global list of CPUs
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cpuList.push_back(this);
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if (number_of_threads > maxThreadsPerCPU)
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maxThreadsPerCPU = number_of_threads;
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// allocate per-thread instruction-based event queues
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comInstEventQueue = new EventQueue *[number_of_threads];
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for (int i = 0; i < number_of_threads; ++i)
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comInstEventQueue[i] = new EventQueue("instruction-based event queue");
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//
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// set up instruction-count-based termination events, if any
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//
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if (p->max_insts_any_thread != 0)
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for (int i = 0; i < number_of_threads; ++i)
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new SimExitEvent(comInstEventQueue[i], p->max_insts_any_thread,
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"a thread reached the max instruction count");
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if (p->max_insts_all_threads != 0) {
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// allocate & initialize shared downcounter: each event will
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// decrement this when triggered; simulation will terminate
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// when counter reaches 0
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int *counter = new int;
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*counter = number_of_threads;
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for (int i = 0; i < number_of_threads; ++i)
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new CountedExitEvent(comInstEventQueue[i],
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"all threads reached the max instruction count",
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p->max_insts_all_threads, *counter);
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}
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// allocate per-thread load-based event queues
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comLoadEventQueue = new EventQueue *[number_of_threads];
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for (int i = 0; i < number_of_threads; ++i)
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comLoadEventQueue[i] = new EventQueue("load-based event queue");
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//
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// set up instruction-count-based termination events, if any
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//
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if (p->max_loads_any_thread != 0)
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for (int i = 0; i < number_of_threads; ++i)
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new SimExitEvent(comLoadEventQueue[i], p->max_loads_any_thread,
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"a thread reached the max load count");
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if (p->max_loads_all_threads != 0) {
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// allocate & initialize shared downcounter: each event will
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// decrement this when triggered; simulation will terminate
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// when counter reaches 0
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int *counter = new int;
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*counter = number_of_threads;
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for (int i = 0; i < number_of_threads; ++i)
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new CountedExitEvent(comLoadEventQueue[i],
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"all threads reached the max load count",
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p->max_loads_all_threads, *counter);
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}
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#ifdef FULL_SYSTEM
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memset(interrupts, 0, sizeof(interrupts));
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intstatus = 0;
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#endif
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functionTracingEnabled = false;
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if (p->functionTrace) {
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functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
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currentFunctionStart = currentFunctionEnd = 0;
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functionEntryTick = p->functionTraceStart;
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if (p->functionTraceStart == 0) {
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functionTracingEnabled = true;
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} else {
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Event *e =
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new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this,
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true);
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e->schedule(p->functionTraceStart);
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}
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}
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}
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void
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BaseCPU::enableFunctionTrace()
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{
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functionTracingEnabled = true;
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}
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BaseCPU::~BaseCPU()
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{
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}
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void
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BaseCPU::init()
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{
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if (!params->deferRegistration)
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registerExecContexts();
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}
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void
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BaseCPU::regStats()
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{
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using namespace Stats;
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numCycles
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.name(name() + ".numCycles")
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.desc("number of cpu cycles simulated")
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;
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int size = execContexts.size();
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if (size > 1) {
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for (int i = 0; i < size; ++i) {
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stringstream namestr;
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ccprintf(namestr, "%s.ctx%d", name(), i);
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execContexts[i]->regStats(namestr.str());
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}
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} else if (size == 1)
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execContexts[0]->regStats(name());
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}
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void
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BaseCPU::registerExecContexts()
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{
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for (int i = 0; i < execContexts.size(); ++i) {
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ExecContext *xc = execContexts[i];
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int cpu_id;
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#ifdef FULL_SYSTEM
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cpu_id = system->registerExecContext(xc);
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#else
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cpu_id = xc->process->registerExecContext(xc);
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#endif
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xc->cpu_id = cpu_id;
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}
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}
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void
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BaseCPU::switchOut()
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{
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// default: do nothing
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}
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void
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BaseCPU::takeOverFrom(BaseCPU *oldCPU)
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{
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assert(execContexts.size() == oldCPU->execContexts.size());
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for (int i = 0; i < execContexts.size(); ++i) {
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ExecContext *newXC = execContexts[i];
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ExecContext *oldXC = oldCPU->execContexts[i];
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newXC->takeOverFrom(oldXC);
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assert(newXC->cpu_id == oldXC->cpu_id);
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#ifdef FULL_SYSTEM
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system->replaceExecContext(newXC, newXC->cpu_id);
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#else
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assert(newXC->process == oldXC->process);
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newXC->process->replaceExecContext(newXC, newXC->cpu_id);
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#endif
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}
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#ifdef FULL_SYSTEM
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for (int i = 0; i < NumInterruptLevels; ++i)
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interrupts[i] = oldCPU->interrupts[i];
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intstatus = oldCPU->intstatus;
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#endif
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}
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#ifdef FULL_SYSTEM
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void
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BaseCPU::post_interrupt(int int_num, int index)
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{
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DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
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if (int_num < 0 || int_num >= NumInterruptLevels)
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panic("int_num out of bounds\n");
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if (index < 0 || index >= sizeof(uint64_t) * 8)
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panic("int_num out of bounds\n");
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checkInterrupts = true;
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interrupts[int_num] |= 1 << index;
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intstatus |= (ULL(1) << int_num);
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}
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void
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BaseCPU::clear_interrupt(int int_num, int index)
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{
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DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
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if (int_num < 0 || int_num >= NumInterruptLevels)
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panic("int_num out of bounds\n");
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if (index < 0 || index >= sizeof(uint64_t) * 8)
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panic("int_num out of bounds\n");
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interrupts[int_num] &= ~(1 << index);
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if (interrupts[int_num] == 0)
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intstatus &= ~(ULL(1) << int_num);
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}
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void
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BaseCPU::clear_interrupts()
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{
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DPRINTF(Interrupt, "Interrupts all cleared\n");
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memset(interrupts, 0, sizeof(interrupts));
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intstatus = 0;
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}
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void
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BaseCPU::serialize(std::ostream &os)
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{
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SERIALIZE_ARRAY(interrupts, NumInterruptLevels);
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SERIALIZE_SCALAR(intstatus);
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}
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void
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BaseCPU::unserialize(Checkpoint *cp, const std::string §ion)
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{
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UNSERIALIZE_ARRAY(interrupts, NumInterruptLevels);
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UNSERIALIZE_SCALAR(intstatus);
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}
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#endif // FULL_SYSTEM
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void
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BaseCPU::traceFunctionsInternal(Addr pc)
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{
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if (!debugSymbolTable)
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return;
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// if pc enters different function, print new function symbol and
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// update saved range. Otherwise do nothing.
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if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
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string sym_str;
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bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
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currentFunctionStart,
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currentFunctionEnd);
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if (!found) {
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// no symbol found: use addr as label
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sym_str = csprintf("0x%x", pc);
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currentFunctionStart = pc;
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currentFunctionEnd = pc + 1;
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}
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ccprintf(*functionTraceStream, " (%d)\n%d: %s",
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curTick - functionEntryTick, curTick, sym_str);
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functionEntryTick = curTick;
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}
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}
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DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU)
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