6c954de33e
a p4 memory/cpu config
arch/alpha/alpha_memory.cc:
Added code to fault on an unaligned access
arch/alpha/isa_desc:
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
Added m5debug break and m5switchcpu (the latter doesn't work)
--HG--
extra : convert_revision : 409e73adb151600a4fea49f35bf6f503f66fa916
54 lines
2.2 KiB
C++
54 lines
2.2 KiB
C++
/*
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* Copyright (c) 2003-2004 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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class ExecContext;
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namespace AlphaPseudo
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{
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/**
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* @todo these externs are only here for a hack in fullCPU::takeOver...
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*/
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extern bool doStatisticsInsts;
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extern bool doCheckpointInsts;
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extern bool doQuiesce;
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void arm(ExecContext *xc);
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void quiesce(ExecContext *xc);
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void ivlb(ExecContext *xc);
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void ivle(ExecContext *xc);
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void m5exit(ExecContext *xc);
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void m5exit_old(ExecContext *xc);
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void resetstats(ExecContext *xc);
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void dumpstats(ExecContext *xc);
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void dumpresetstats(ExecContext *xc);
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void m5checkpoint(ExecContext *xc);
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void readfile(ExecContext *xc);
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void debugbreak(ExecContext *xc);
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void switchcpu(ExecContext *xc);
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}
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