gem5/src/arch/x86/isa/microops
Andreas Sandberg de89e133d8 x86: Fix the flag handling code in FABS and FCHS
This changeset fixes two problems in the FABS and FCHS
implementation. First, the ISA parser expects the assignment in
flag_code to be a pure assignment and not an and-assignment, which
leads to the isa_parser omitting the misc reg update. Second, the FCHS
and FABS macro-ops don't set the SetStatus flag, which means that the
default micro-op version, which doesn't update FSW, is executed.
2013-06-18 16:10:21 +02:00
..
base.isa GCC: Get everything working with gcc 4.6.1. 2011-10-31 01:09:44 -07:00
debug.isa x86: Add a separate register for D flag bit 2012-09-11 09:25:43 -05:00
fpop.isa x86: Fix the flag handling code in FABS and FCHS 2013-06-18 16:10:21 +02:00
ldstop.isa X86: Fix address size handling so real mode works properly. 2012-03-31 12:27:33 -07:00
limmop.isa ISA parser: Use '_' instead of '.' to delimit type modifiers on operands. 2011-09-26 23:48:54 -07:00
mediaop.isa x86: implements emms instruction 2013-01-15 07:43:20 -06:00
microops.isa copyright: Change HP copyright on x86 code to be more friendly 2010-05-23 22:44:15 -07:00
regop.isa x86: add op class for int and fp microops in isa description 2013-05-21 11:33:57 -05:00
seqop.isa x86: Add a separate register for D flag bit 2012-09-11 09:25:43 -05:00
specop.isa x86: Add a separate register for D flag bit 2012-09-11 09:25:43 -05:00