Andreas Hansson e65de3f5ca config: Do not use hardcoded physmem in fs script ... This patch generalises the address range resolution for the I/O cache and I/O bridge such that they do not assume a single memory. The patch involves adding a parameter to the system which is then defined based on the memories that are to be visible from the I/O subsystem, whether behind a cache or a bridge. The change is needed to allow interleaved memory controllers in the system.		2013-01-07 13:05:38 -05:00
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fs.py	config: Do not use hardcoded physmem in fs script	2013-01-07 13:05:38 -05:00
memtest.py	Configs: Fix memtest cache latency to match new parameters	2012-09-27 08:59:25 -04:00
ruby_direct_test.py	ruby: modify the directed tester to read/write streams	2012-12-11 10:05:55 -06:00
ruby_fs.py	arch: Make the ISA class inherit from SimObject	2013-01-07 13:05:35 -05:00
ruby_mem_test.py	ruby: improved support for functional accesses	2012-10-15 17:51:57 -05:00
ruby_network_test.py	ruby: changes how Topologies are created	2012-07-10 22:51:53 -07:00
ruby_random_test.py	ruby: remove the cpu assumptions for the random tester	2012-07-10 22:51:54 -07:00
se.py	arch: Make the ISA class inherit from SimObject	2013-01-07 13:05:35 -05:00