e59d0e3e89
Caches are now responsible for their own statistic gathering. This requires a direct callback from the protocol on misses, and so all future protocols need to take this into account.
15 lines
624 B
Text
Executable file
15 lines
624 B
Text
Executable file
M5 Simulator System
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Copyright (c) 2001-2008
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The Regents of The University of Michigan
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All Rights Reserved
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M5 compiled Jul 19 2009 14:52:18
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M5 revision 544d33334ee1+ 6369+ default tip
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M5 started Jul 19 2009 14:52:23
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M5 executing on clover-01.cs.wisc.edu
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command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby -re tests/run.py build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby
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Global frequency set at 1000000000000 ticks per second
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info: Entering event queue @ 0. Starting simulation...
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Exiting @ tick 31814464 because maximum number of loads reached
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