Chander Sudanthi 61c14da751 O3: Remove hardcoded tgts_per_mshr in O3CPU.py. ... There are two lines in O3CPU.py that set the dcache and icache tgts_per_mshr to 20, ignoring any pre-configured value of tgts_per_mshr. This patch removes these hardcoded lines from O3CPU.py and sets the default L1 cache mshr targets to 20. --HG-- extra : rebase_source : 6f92d950e90496a3102967442814e97dc84db08b		2011-12-01 00:15:22 -08:00
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inorder-timing.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
memtest-ruby.py	Ruby: Add support for functional accesses	2011-06-30 19:49:26 -05:00
memtest.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
o3-timing-mp-ruby.py	Config: Keep track of uncached and cached ports separately.	2011-02-03 20:23:00 -08:00
o3-timing-mp.py	O3: Remove hardcoded tgts_per_mshr in O3CPU.py.	2011-12-01 00:15:22 -08:00
o3-timing-ruby.py	Config: Keep track of uncached and cached ports separately.	2011-02-03 20:23:00 -08:00
o3-timing.py	O3: Remove hardcoded tgts_per_mshr in O3CPU.py.	2011-12-01 00:15:22 -08:00
pc-o3-timing.py	O3: Remove hardcoded tgts_per_mshr in O3CPU.py.	2011-12-01 00:15:22 -08:00
pc-simple-atomic.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
pc-simple-timing.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
realview-o3-dual.py	O3: Remove hardcoded tgts_per_mshr in O3CPU.py.	2011-12-01 00:15:22 -08:00
realview-o3.py	O3: Remove hardcoded tgts_per_mshr in O3CPU.py.	2011-12-01 00:15:22 -08:00
realview-simple-atomic-dual.py	ARM: Add some MP regressions and clean up the disk images and kernels a bit	2011-08-19 15:08:09 -05:00
realview-simple-atomic.py	ARM: Add some MP regressions and clean up the disk images and kernels a bit	2011-08-19 15:08:09 -05:00
realview-simple-timing-dual.py	ARM: Add some MP regressions and clean up the disk images and kernels a bit	2011-08-19 15:08:09 -05:00
realview-simple-timing.py	ARM: Add some MP regressions and clean up the disk images and kernels a bit	2011-08-19 15:08:09 -05:00
rubytest-ruby.py	Ruby: Add support for functional accesses	2011-06-30 19:49:26 -05:00
simple-atomic-mp-ruby.py	Config: Keep track of uncached and cached ports separately.	2011-02-03 20:23:00 -08:00
simple-atomic-mp.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
simple-atomic.py	Config: Keep track of uncached and cached ports separately.	2011-02-03 20:23:00 -08:00
simple-timing-mp-ruby.py	Ruby: Add support for functional accesses	2011-06-30 19:49:26 -05:00
simple-timing-mp.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
simple-timing-ruby.py	Ruby: Add support for functional accesses	2011-06-30 19:49:26 -05:00
simple-timing.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
t1000-simple-atomic.py	Config: Keep track of uncached and cached ports separately.	2011-02-03 20:23:00 -08:00
tsunami-inorder.py	inorder: make InOrder CPU FS compilable/visible	2011-06-19 21:43:39 -04:00
tsunami-o3-dual.py	O3: Remove hardcoded tgts_per_mshr in O3CPU.py.	2011-12-01 00:15:22 -08:00
tsunami-o3.py	O3: Remove hardcoded tgts_per_mshr in O3CPU.py.	2011-12-01 00:15:22 -08:00
tsunami-simple-atomic-dual.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
tsunami-simple-atomic.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
tsunami-simple-timing-dual.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
tsunami-simple-timing.py	Mem: Fix issue with dirty block being lost when entire block transferred to non-cache.	2011-03-17 19:20:19 -05:00
twosys-tsunami-simple-atomic.py	Config: Keep track of uncached and cached ports separately.	2011-02-03 20:23:00 -08:00