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Ron Dreslinski d5ac1cb51f Pulled out changes to fix EIO programs with caches. Also fixes any translatingPort read/write Blob function problems with caches.
-Basically removed the ASID from places it is no longer needed due to PageTable

src/mem/cache/cache.hh:
src/mem/cache/cache_impl.hh:
src/mem/cache/miss/blocking_buffer.cc:
src/mem/cache/miss/blocking_buffer.hh:
src/mem/cache/miss/miss_queue.cc:
src/mem/cache/miss/miss_queue.hh:
src/mem/cache/miss/mshr.cc:
src/mem/cache/miss/mshr.hh:
src/mem/cache/miss/mshr_queue.cc:
src/mem/cache/miss/mshr_queue.hh:
src/mem/cache/prefetch/base_prefetcher.cc:
src/mem/cache/prefetch/base_prefetcher.hh:
src/mem/cache/tags/fa_lru.cc:
src/mem/cache/tags/fa_lru.hh:
src/mem/cache/tags/iic.cc:
src/mem/cache/tags/iic.hh:
src/mem/cache/tags/lru.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.cc:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.cc:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.cc:
src/mem/cache/tags/split_lru.hh:
    Remove asid where it wasn't neccesary anymore due to Page Table

--HG--
extra : convert_revision : ab8bbf4cc47b9eaefa9cdfa790881a21d0e7bf28
2006-08-15 16:21:46 -04:00
build_opts split off fullsystem and se iprs into two functions to remove lots of #ifs 2006-05-29 16:53:47 -04:00
configs Clean up some more config stuff. 2006-07-27 17:49:00 -04:00
ext New directory structure: 2006-05-22 14:29:33 -04:00
src Pulled out changes to fix EIO programs with caches. Also fixes any translatingPort read/write Blob function problems with caches. 2006-08-15 16:21:46 -04:00
tests Update ref stats. 2006-07-27 17:47:43 -04:00
util Minor updates. 2006-06-17 22:55:00 -04:00
AUTHORS Make O3CPU model independent of the ISA 2006-06-30 19:52:08 -04:00
LICENSE Remove authors from copyright. 2006-05-28 23:26:15 -04:00
README Update release files. 2006-08-15 08:49:15 -07:00
RELEASE_NOTES Update release files. 2006-08-15 08:49:15 -07:00
SConstruct Last minute check in. Very few functional changes other than some minor config updates. Also include some recently generated stats. 2006-07-22 15:50:39 -04:00

This is release 2.0_beta of the M5 simulator.

For detailed information about building the simulator and getting
started please refer to http://www.m5sim.org.

Specific pages of interest are:
http://www.m5sim.org/wiki/index.php/Compiling_M5
http://www.m5sim.org/wiki/index.php/Running_M5

Short version:

1. If you don't have SCons version 0.96.91 or newer, get it from
http://wwww.scons.org.

2. If you don't have SWIG version 0.96.91 or newer, get it from
http://wwww.swig.org.

3. In this directory, type 'scons build/ALPHA_SE/tests/debug/quick'.  This
will build the debug version of the m5 binary (m5.debug) for the Alpha
syscall emulation target, and run the quick regression tests on it.

If you have questions, please send mail to m5sim-users@lists.sourceforge.net.

WHAT'S INCLUDED (AND NOT)
-------------------------

The basic source release includes these subdirectories:
 - m5: 
   - src: source code of the m5 simulator
   - tests: regression tests
   - ext: less-common external packages needed to build m5
   - system/alpha: source for Alpha console and PALcode

To run full-system simulations, you will need compiled console,
PALcode, and kernel binaries and one or more disk images.  These files
are collected in a separate archive, m5_system_1.1.tar.bz2.  This file
can he downloaded separately.

M5 supports Linux 2.4/2.6, FreeBSD, and the proprietary Compaq/HP
Tru64 version of Unix. We are able to distribute Linux and FreeBSD
bootdisks, but we are unable to distribute bootable disk images of
Tru64 Unix. If you have a Tru64 license and are interested in
obtaining disk images, contact us at m5-dev@eecs.umich.edu.